JPS58116829A - クロツクパルス発生回路 - Google Patents

クロツクパルス発生回路

Info

Publication number
JPS58116829A
JPS58116829A JP56210398A JP21039881A JPS58116829A JP S58116829 A JPS58116829 A JP S58116829A JP 56210398 A JP56210398 A JP 56210398A JP 21039881 A JP21039881 A JP 21039881A JP S58116829 A JPS58116829 A JP S58116829A
Authority
JP
Japan
Prior art keywords
clock pulse
phase
signal
clock
shift
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56210398A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6362145B2 (enrdf_load_stackoverflow
Inventor
Tetsuo Inose
猪瀬　哲男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP56210398A priority Critical patent/JPS58116829A/ja
Publication of JPS58116829A publication Critical patent/JPS58116829A/ja
Publication of JPS6362145B2 publication Critical patent/JPS6362145B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Television Systems (AREA)
JP56210398A 1981-12-30 1981-12-30 クロツクパルス発生回路 Granted JPS58116829A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56210398A JPS58116829A (ja) 1981-12-30 1981-12-30 クロツクパルス発生回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56210398A JPS58116829A (ja) 1981-12-30 1981-12-30 クロツクパルス発生回路

Publications (2)

Publication Number Publication Date
JPS58116829A true JPS58116829A (ja) 1983-07-12
JPS6362145B2 JPS6362145B2 (enrdf_load_stackoverflow) 1988-12-01

Family

ID=16588656

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56210398A Granted JPS58116829A (ja) 1981-12-30 1981-12-30 クロツクパルス発生回路

Country Status (1)

Country Link
JP (1) JPS58116829A (enrdf_load_stackoverflow)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS497979A (enrdf_load_stackoverflow) * 1972-05-11 1974-01-24

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS497979A (enrdf_load_stackoverflow) * 1972-05-11 1974-01-24

Also Published As

Publication number Publication date
JPS6362145B2 (enrdf_load_stackoverflow) 1988-12-01

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