JPS58115484A - Vector generation system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a vector method in a graphics device, and particularly to a method for generating vectors other than solid lines such as broken lines and dash-dotted lines.

(2) Prior art and problems When generating a vector in a graphics device such as a graphic e-display device, generally the starting point coordinates,
I specify the end point coordinates and line type sound and display everything, but the line type is broken 11! ! For vectors other than solid lines, such as the +1-dotted chain line, each line segment and the interval between them are constant.Next, if a vector tube is generated in order from the starting point, the line will change at the end point depending on the length of the vector, as shown in Figure 1. The minute mark is gone.)
Furthermore, since a dashed line may end up as a short line, it is not possible to generate a clean vector.

(3) Purpose of the Invention The present invention eliminates the above-mentioned drawbacks, and aims to provide an entire vector generation system that allows vector tubes other than solid lines to be clearly drawn.

(4) Structure of the invention and the next step 1 The vector generation method of the present invention includes: 1 a controller that controls the entire graphic device; an address generation circuit that determines the position of the figure to be drawn; and a vector generator of the specified line type. In a graphics device that is fully equipped with a vector generation circuit, the vector generation circuit includes a counter, a plurality of vector signal generation circuits that generate various vectors based on digit signals of a cough counter, and a line in which line type information is set. The controller includes a line type register and a multiplexer for selecting one of the output signals of the plurality of vector signal generation circuits according to the contents of the line type register, and the controller includes:
An initial value for the counter is calculated based on the vector length and line type information, and the initial value is set in the counter and a line type information sound is set in the line type register. It is characterized by:

(5) Examples of the invention Hereinafter, the present invention will be explained with reference to the drawings.

FIG. 2 is a diagram showing an outline of the graphical device of the present invention, FIG. 3 is a diagram showing examples of solid line, broken line, dotted line, and one-dot chain line patterns, and FIG. 4 is a diagram showing one example of the vector vector generation circuit of the present invention. A block diagram of the embodiment, FIG. 5 is a diagram for explaining the length of line segments and intervals between dashed lines and dashed-dotted lines, and WJ6 diagram is from this vh
FIG. 3 is a diagram illustrating an example of vector generation according to the embodiment of the present invention;

In FIG. 2, 1 is an interface circuit for connecting the graphics device and the host processor, 2 is a controller composed of a microprocessor, etc., and controls the 29 graphics devices, 3 is a graphics memory, and 4 is a controller. Shape memory 3
Reference numeral 5 designates an address generation circuit that generates vector write addresses for vectors, numeral 5 designates a vector generation circuit that generates each of the s types of vectors, and 6 designates a display control (b) path.

A host processor (-not shown) transfers various graphic generation commands and related data of the commands to the controller 2 via the image forming circuit 1f. If the command is a vector generation command, the starting point coordinates, ending point coordinates, and line type information are transferred to the controller as related data. Control 4-22 sets the start point coordinates and end point coordinates in the address generation circuit 4 from the transferred related data. Also, the controller 3.

The length of the line segment that touches the starting point is calculated from the length of the vector calculated from the starting point coordinates and the ending point coordinates and the line type information, and the initial value of the counter and line type information for generating this length are calculated using the vector generation circuit 5. Set to . Note that the vector generator 5
This will be explained in detail later. The address generation circuit 4 generates an address tube in the graphic memory 3 from the set starting point coordinates to the ending point coordinates, and generates a pattern as shown in FIG. 3 from the internal counter value and line type information. In the circuit that generates 6, in FIG. 3, when the mark is 0, writing is performed in the graphic memory 3, and when the mark is x and 1, no writing is performed. These address generation circuit 4 and vector generation circuit 5 write a vector specified by a command into the graphic memory 3. The display control circuit DC is the graphic memory 3 in which graphics are written! O which controls the output to the IcRT display etc. Figure 4 shows l'j! of the vector generation circuit 5. It is a block diagram of an example. In FIG. 4, 7 is a counter, 8 is a register, 9 is a multiplexer, 10 is an AND circuit, 11
%12 shows all NOR circuits. As mentioned earlier, the controller 2 sends the initial value to the tube counter 7.

When the set signal is turned on, the initial value is set in the counter 7, and when all the count signals are turned on.

The contents of the counter 7 are updated sequentially. controller 2
sends line type information to register 8 p.

When all the set signals are turned on, the line type information is set to register 8.
is set to The register 8 indicates that the vector line type instruction signal VTO and VTI output are 0. ' digit) and the second digit are "1", rlJt is output, and in other cases, all "0" is output. NAND circuit 12Fi outputs rQJt when @1 digit, 3rd digit, and 4th digit are "1", and outputs "1" in other cases. NOT circuit 12
The inverted version of the output tube of the AND circuit IO outputs the entire output.

The multiplexer 12 outputs a fixed signal l! of "l" in the case of the solid line. In the case of the dashed line, the output tube of the NOT circuit 12 is selected; in the case of the one-dot line, the output tube of the AND circuit 10 is selected; in the case of the one-dot chain line, N A N f) 1gl
Select the output tube of path 11.

As mentioned earlier, the CONR-92 calculates the length of the line segment touching the starting point from the length of the vector and the line type information, and sets this value in the counter 7 as the initial value. Now, if the length of the vector is one length a, and the interval between them is h, then L = & (α 1 II ) 10 k (where, le is an integer, a - b (k≦2a) Find k, expressed as 111', so that the length of the line segment touching the starting point and the ending point is /'l.The relationship between the line segment a and the distance is shown in Figure 5. , when generating a dashed-dotted line with vector length L of 70, if a is reached and h is 6, then k is found to be 32, and therefore the counter 7 is set so that the length of the line segment touching the starting point is 16. As an initial value, α-/2=10 is expressed in binary as [01010J
and set "11" in register 8. From this state, if you increase the count of counter 7,
From the output of multiplexer 9.

A write control signal to the graphic memory 3 as shown in FIG. 6 is obtained. At this time, the length of both line segments touching the starting point and the ending point is 16, and the vector is symmetrical about the midpoint.

In the above embodiment, the output of the vector generation circuit 3 is used as a write control signal in order to temporarily write the vector into the graphic memory 3, but it can be used directly as a pen up/down signal in an XY plotter device.

(6) Effects of the Invention As is clear from the above description, according to the present invention, a clean vector can always be drawn regardless of the length of the vector.

[Brief explanation of drawings]

FIG. 1 is a diagram explaining the problems of the conventional vector generation method, FIG. 2 is a diagram showing an outline of the graphic device of the present invention, and FIG. 3 is a diagram showing patterns of solid lines, broken lines, dotted lines, and one-dot chain lines. ,
FIG. 4 is a block diagram of one embodiment of the vector generation circuit of the present invention, FIG. 5 is a diagram for explaining the lengths of line segments and intervals between dashed lines and dot-dashed lines, and FIG. 6 is a diagram illustrating the implementation of the present invention. FIG. 6 is a diagram illustrating an example of the generation of vectors; 1... Interface circuit, 2... Controller,
3...Graphic memory, 4...Address generation circuit, 5.
...Vector generation circuit, 6...Display control circuit, 7...
- Counter, 8... register, 9... multiplexer. % Applicant: Fujitsu Limited Representative Patent Attorney: Yobu Kyotani

Claims (1)

[Claims] In a graphic device that is fully equipped with a controller that controls the entire graphic device, an address generation circuit that determines the position of the figure to be drawn, and a vector generation circuit that generates a vector tube of the specified line type, the vector generation circuit is a counter. , a plurality of vector signal generation circuits that generate various vector tubes based on the digit signals of the counter, and a line type register in which line type information is set, and the content pressure of the S cough line type register, and thus generate the plurality of vector signals. and a multiplexer for selecting one of the output signals of the circuit, the controller calculates all initial values for the counter according to the vector length and line type information, and sets all the initial values to the counter. The vector generation method is characterized in that the line type information tube is set in the above-mentioned line type register.