JPS58111965U - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPS58111965U
JPS58111965U JP836582U JP836582U JPS58111965U JP S58111965 U JPS58111965 U JP S58111965U JP 836582 U JP836582 U JP 836582U JP 836582 U JP836582 U JP 836582U JP S58111965 U JPS58111965 U JP S58111965U
Authority
JP
Japan
Prior art keywords
integrated circuit
circuit device
hybrid integrated
metal plate
ceramic substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP836582U
Other languages
Japanese (ja)
Inventor
山田　辰彦
神谷　謙太郎
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP836582U priority Critical patent/JPS58111965U/en
Publication of JPS58111965U publication Critical patent/JPS58111965U/en
Pending legal-status Critical Current

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  • Structure Of Printed Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の一実施例の混成集積回路装置を分解し
て示した斜視図、第２図は第１図のＡ−Ａ′矢視断面図
である。尚、図において、１・・・・・・　−金属板、
２・・・・・・凹部、３・・・・・・セラミック基板。FIG. 1 is an exploded perspective view of a hybrid integrated circuit device according to an embodiment of the present invention, and FIG. 2 is a sectional view taken along the line A-A' in FIG. In addition, in the figure, 1... - metal plate,
2... Concavity, 3... Ceramic substrate.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 表面に回路配線等が設けられているセラミック基板の裏
面と金属板とが固着されてなる混成集積回路装置におい
て、前記金属板には凹部が形成され、前記凹部に前記セ
ラミック基板が固着されていることを特徴とする混成集
積回路装置。In a hybrid integrated circuit device in which a metal plate is fixed to the back side of a ceramic substrate on which circuit wiring etc. are provided on the front surface, a recess is formed in the metal plate, and the ceramic substrate is fixed to the recess. A hybrid integrated circuit device characterized by:
JP836582U 1982-01-25 1982-01-25 Hybrid integrated circuit device Pending JPS58111965U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP836582U JPS58111965U (en) 1982-01-25 1982-01-25 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP836582U JPS58111965U (en) 1982-01-25 1982-01-25 Hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPS58111965U true JPS58111965U (en) 1983-07-30

Family

ID=30021062

Family Applications (1)

Application Number Title Priority Date Filing Date
JP836582U Pending JPS58111965U (en) 1982-01-25 1982-01-25 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPS58111965U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4879976A (en) * 1972-01-28 1973-10-26

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4879976A (en) * 1972-01-28 1973-10-26

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