JPS58108702U - automatic train deceleration device - Google Patents
automatic train deceleration deviceInfo
- Publication number
- JPS58108702U JPS58108702U JP16380882U JP16380882U JPS58108702U JP S58108702 U JPS58108702 U JP S58108702U JP 16380882 U JP16380882 U JP 16380882U JP 16380882 U JP16380882 U JP 16380882U JP S58108702 U JPS58108702 U JP S58108702U
- Authority
- JP
- Japan
- Prior art keywords
- train
- counter
- speed
- storage device
- deceleration device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来のパターン発生の例を示す。第２図は第１
図に示す例の出力を示す。第３図は本考案によるパター
ン発生方式の実施例を示す。第４図は記憶装置の内容の
例を示す。第５図は記憶装置内のプログラムの例。第６
図はカウンタと記憶装置の接続を示す例。第７図は本考
案を用いて列車制御を行う方式の例を示す。第８図は本
考案の他の実施例を示す。
１・二・速度検出器、２，３・・・カウンタ、４・・・
制御回路、１１・・・速度検出器、１２・・・受信器、
１３・・・カウンタ、１４・・・記憶装置、１５゛・・
・分周器、１６・・・加算器、１７・・・レジスタ、１
Ｂ、 １９． ２０・・・フリップフロップ、２１，
２２．２３．２４・・・ゲート回路、Ａｏ、 Ａ、、
Ａ２． Ａｎ−・・記憶装置の番地指定入力、Ｏｏ、Ｏ
ｎ・・・記憶装置の出力、４・・・デコーダー、０００
〜１１１・・・読み出し線、３１・・・速度パターン発
生部、３２・・・周波数発生部、３３・・・周波数比較
器、４１・・・カウンタ、４２・・・加算器。FIG. 1 shows an example of conventional pattern generation. Figure 2 is the first
Shows the output of the example shown in the figure. FIG. 3 shows an embodiment of the pattern generation method according to the present invention. FIG. 4 shows an example of the contents of the storage device. FIG. 5 is an example of a program in a storage device. 6th
The figure shows an example of the connection between a counter and a storage device. FIG. 7 shows an example of a method for controlling trains using the present invention. FIG. 8 shows another embodiment of the invention. 1, 2, speed detector, 2, 3...counter, 4...
Control circuit, 11...speed detector, 12...receiver,
13...Counter, 14...Storage device, 15゛...
・Frequency divider, 16... Adder, 17... Register, 1
B, 19. 20...Flip-flop, 21,
22.23.24...Gate circuit, Ao, A...
A2. An-...Storage device address specification input, Oo, O
n... Output of storage device, 4... Decoder, 000
~111... Readout line, 31... Speed pattern generation section, 32... Frequency generation section, 33... Frequency comparator, 41... Counter, 42... Adder.
Claims (1)
ターンによって列車を自動減速するものにおいて、車上
に、地上からの信号を受信する受信器と、列車速度に比
例した周波数のパルス列を発生する手段と、前記受信器
の動作後に前記周波数信号を計数するカウンタと、この
カウンタの計数内容毎に基準速度に対応する薮値を記憶
した記憶装置とを有し、前記列車が前記受信器の動作後
所定距離進む毎に記憶装置からカウンタの計数内容に対
応した数値信号を読み出し前記速度パターンとすること
を特徴とする列車自動減速装置。A system that automatically decelerates a train based on a speed pattern in which the standard speed changes sequentially with respect to the distance traveled by the train, has a receiver on the train that receives signals from the ground, and generates a pulse train with a frequency proportional to the train speed. means, a counter for counting the frequency signal after the operation of the receiver, and a storage device storing a bush value corresponding to a reference speed for each count of the counter, An automatic train deceleration device characterized in that each time a train travels a predetermined distance, a numerical signal corresponding to the count of a counter is read out from a storage device and used as the speed pattern.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16380882U JPS58108702U (en) | 1982-10-27 | 1982-10-27 | automatic train deceleration device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16380882U JPS58108702U (en) | 1982-10-27 | 1982-10-27 | automatic train deceleration device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58108702U true JPS58108702U (en) | 1983-07-25 |
Family
ID=30102052
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16380882U Pending JPS58108702U (en) | 1982-10-27 | 1982-10-27 | automatic train deceleration device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58108702U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4995307A (en) * | 1973-01-13 | 1974-09-10 |
-
1982
- 1982-10-27 JP JP16380882U patent/JPS58108702U/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4995307A (en) * | 1973-01-13 | 1974-09-10 |
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