JPS58106835A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To effectively apply gettering to the crystal defect generated on an element forming region in a semiconductor manufacturing process from the periphery, by selectively introducing a processed strain layer having the gettering effect, by the uniform external stress, with a stress absorption film as a mask, into an inactive region wherein an element formation is not performed. CONSTITUTION:A P type Si substrate 2 wherein a back surface processed strain layer 1 is introduced is applied to the first heat treatment in atmosphere oxidized at a high temperature, and a stacking fault 3 is grown on the back surface. But, when an N<+> burial diffusion heat treatment is performed at a high temperature for a long time, it is annealed, then the strain layer on the back surface is greatly reduced, and accordingly the crystal defect becomes easy to generate. Then, after P<+> type burial diffusion, with an oxide film 5 as a mask, a strain layer is formed on a P<+> type diffused region 7 by the uniform external stress 6 e.g. O2 plasma, ion-implanted laser, and sand blast, next a P<+> type press-in heat treatment is performed, and thereby the crystal defect layer 8' is generated. Since this crystal defect makes the crystal defect, introduced into later semiconductor manufacturing processes and the acive region 10, to be effectively absorbed from the periphery, the element characteristic is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device manufacturing method K or 9, particularly a method for manufacturing a semiconductor device in which crystal defects having a gettering effect are selectively formed in an inactive region in an epitaxial growth layer where no elements are formed. This relates to a manufacturing method. - Conventionally known methods for reducing crystal defects that occur in semiconductor substrates include forming a strained layer by machining the backside of the substrate, heat treatment (annealing) of the substrate, and gettering by impurity diffusion. The effectiveness of this method is unclear due to the relationship with the various heat treatment conditions required in the semiconductor manufacturing process, and depending on the process used, it may even be a factor that induces crystal defects. A general method had not been established.

The present invention aims to eliminate the drawbacks of the prior art, and its features include selectively introducing a process-strained layer due to external stress into the inactive region on the surface of the semiconductor substrate, which is generated in the active region during the manufacturing process. A semiconductor device manufacturing method that effectively getters crystal defects from around the active region to significantly improve the characteristics of the device. In general, bipolar ICs are made by insulating and separating the epitaxial growth layer and placing the device in an island-like zero region. However, because it is necessary to shorten the heat treatment time for the above-mentioned insulation separation and to reduce lateral diffusion, Kl' in the medium conductor substrate immediately below
An n-type buried diffusion region containing an impurity higher in impurity concentration than the epitaxially grown layer is formed in the 46 conductor substrate immediately below the isolated island-shaped element formation region.

@ Figure 1 (al to Figure 1(e) is a cross-sectional view showing the IC manufacturing process that has a gettering effect by a back side processing strained layer that is generally performed. First, as shown in Figure 1 (al) When a P-type silicon substrate 2 with a strained layer 1 formed on its back side is subjected to first heat treatment in a high-temperature oxidizing atmosphere, the result is a P-type silicon substrate 2 (Fig. 1 (1)).
Stacking faults 3 grow on the back surface as shown in FIG. But the first
As shown in Figure (C), the h+ buried diffusion layer 40 is formed by high-temperature heat treatment.
By performing the formation and P+ type buried diffusion 7, the number of stacking defects on the back side is reduced.Furthermore, as shown in FIG.
When 3'' is formed, the stacking faults 3" on the back side are further reduced, and the stacking faults on the back side are further reduced and eliminated by subsequent heat treatment, etc., so that the crystal defects introduced in the semiconductor manufacturing process cannot be fully absorbed, resulting in the problem shown in Figure 1 (6). As shown in FIG.
2 occurs frequently and causes deterioration of device characteristics.

On the other hand, FIGS. 2(-) to 2(erFi) show an embodiment of the present invention, and show a case where a strained layer is selectively introduced into an inactive region.

Figure 2 (- indicates Figure 1) A Pg silicon substrate 2 with a strained layer 1 introduced thereon similar to that of a horse chestnut is subjected to a first heat treatment in a high-temperature oxidizing atmosphere, and then laminated on the back side as shown in Figure 2 (b). Defect 3
grow. However, if N+ buried diffusion heat treatment is performed at high temperature and for a long time as shown in FIG. 2(C), the strained layer on the back surface will be significantly reduced due to seven anneals, and crystal defects will be more likely to occur. Then, using the P+ pear-shaped buried post-diffusion film 5 as a mask, a uniform external stress 6 is applied to the P type diffusion region 7, for example 0. A strained layer is formed using plasma, ion implantation laser, sand gel last, etc.
Next, as shown in Fig. 2(d), P mold indentation heat treatment mt
- By doing so, a crystal defect layer is generated. Since these crystal defects introduced into the semiconductor manufacturing process and the active region 10 are effectively absorbed from the surrounding area, the device characteristics are greatly improved.

As explained above, the present invention utilizes a stress-absorbing film as a mask in an inactive region where no elements are formed, and selectively introduces a strained layer that absorbs the shgettering effect by applying uniform external stress to the semiconductor manufacturing process. This is a manufacturing method in which crystal defects generated in the middle element formation area are effectively gettered from the surrounding area.

[Brief explanation of the drawing]

FIG. 1 (IJ to FIG. 1(e) are cross-sectional views illustrating the process of manufacturing an IC transistor using a conventional gettering method. FIG. 2(a) to FIG. e
) Ti is a cross-sectional view showing the process of manufacturing a bipolar IC transistor using the gettering method of the embodiment of the present invention.
・P-type silicon substrate, 3.3', 3"... stacking fault, 4...4-buried diffusion layer, 5... oxide film, 6...・・External stress (e.g. duck bear, ion implantation, laser and sand plus) 4, 7...
...P type buried diffusion region, 8...P+ type buried diffusion layer, 8'...Crystal defect generated in P+ type buried diffusion layer, 9...・Inactive region, lO...
・Active region, 11... Ebitaki Eyal growth layer,
It is.

Claims (1)

[Claims] A semiconductor characterized by forming a stress-absorbing mask pattern on an active region on the surface of a semiconductor crystal substrate, applying external stress to the entire surface, and selectively forming a processed strained layer having a gettering effect in an inactive region. Method of manufacturing the device.