JPS58105154U - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS58105154U
JPS58105154U JP1982002307U JP230782U JPS58105154U JP S58105154 U JPS58105154 U JP S58105154U JP 1982002307 U JP1982002307 U JP 1982002307U JP 230782 U JP230782 U JP 230782U JP S58105154 U JPS58105154 U JP S58105154U
Authority
JP
Japan
Prior art keywords
pellet
semiconductor equipment
semiconductor
abstract
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1982002307U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0229725Y2 (enExample
Inventor
北村　裕二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP1982002307U priority Critical patent/JPS58105154U/ja
Publication of JPS58105154U publication Critical patent/JPS58105154U/ja
Application granted granted Critical
Publication of JPH0229725Y2 publication Critical patent/JPH0229725Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
JP1982002307U 1982-01-11 1982-01-11 半導体装置 Granted JPS58105154U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1982002307U JPS58105154U (ja) 1982-01-11 1982-01-11 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1982002307U JPS58105154U (ja) 1982-01-11 1982-01-11 半導体装置

Publications (2)

Publication Number Publication Date
JPS58105154U true JPS58105154U (ja) 1983-07-18
JPH0229725Y2 JPH0229725Y2 (enExample) 1990-08-09

Family

ID=30015295

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1982002307U Granted JPS58105154U (ja) 1982-01-11 1982-01-11 半導体装置

Country Status (1)

Country Link
JP (1) JPS58105154U (enExample)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5586354U (enExample) * 1978-12-11 1980-06-14

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5586354U (enExample) * 1978-12-11 1980-06-14

Also Published As

Publication number Publication date
JPH0229725Y2 (enExample) 1990-08-09

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