JPS6052656U - 回路基板 - Google Patents

回路基板

Info

Publication number
JPS6052656U
JPS6052656U JP1983145618U JP14561883U JPS6052656U JP S6052656 U JPS6052656 U JP S6052656U JP 1983145618 U JP1983145618 U JP 1983145618U JP 14561883 U JP14561883 U JP 14561883U JP S6052656 U JPS6052656 U JP S6052656U
Authority
JP
Japan
Prior art keywords
circuit board
substrate
semiconductor
covering
abstract
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1983145618U
Other languages
English (en)
Inventor
沢田 俊行
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Tottori Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tottori Sanyo Electric Co Ltd, Sanyo Electric Co Ltd filed Critical Tottori Sanyo Electric Co Ltd
Priority to JP1983145618U priority Critical patent/JPS6052656U/ja
Publication of JPS6052656U publication Critical patent/JPS6052656U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09072Hole or recess under component or special relationship between hole and component

Landscapes

  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第1図は従来の回路基板の斜視図、第2図は本考案実施
例の基板の平面図aと断面図すである。 1・・・基板、2・・・半導体、3・・・被覆体、4,
4・・・透孔。

Claims (1)

    【実用新案登録請求の範囲】
  1. 基板と、基板上に載置された半導体と、半導体を覆い基
    板上に設けられた被覆体と、被覆体の少なくとも一部に
    添って基板に設けられた透孔とを具備した事を特徴とす
    る回路基板。
JP1983145618U 1983-09-19 1983-09-19 回路基板 Pending JPS6052656U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983145618U JPS6052656U (ja) 1983-09-19 1983-09-19 回路基板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983145618U JPS6052656U (ja) 1983-09-19 1983-09-19 回路基板

Publications (1)

Publication Number Publication Date
JPS6052656U true JPS6052656U (ja) 1985-04-13

Family

ID=30324378

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983145618U Pending JPS6052656U (ja) 1983-09-19 1983-09-19 回路基板

Country Status (1)

Country Link
JP (1) JPS6052656U (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012158228A (ja) * 2011-01-31 2012-08-23 Advics Co Ltd ソレノイド制御装置
JP2017054990A (ja) * 2015-09-10 2017-03-16 パナソニックIpマネジメント株式会社 発光装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5012249B1 (ja) * 1969-03-31 1975-05-10

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5012249B1 (ja) * 1969-03-31 1975-05-10

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012158228A (ja) * 2011-01-31 2012-08-23 Advics Co Ltd ソレノイド制御装置
JP2017054990A (ja) * 2015-09-10 2017-03-16 パナソニックIpマネジメント株式会社 発光装置

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