JPS58104510A - Power amplifier - Google Patents

Power amplifier

Info

Publication number
JPS58104510A
JPS58104510A JP20390281A JP20390281A JPS58104510A JP S58104510 A JPS58104510 A JP S58104510A JP 20390281 A JP20390281 A JP 20390281A JP 20390281 A JP20390281 A JP 20390281A JP S58104510 A JPS58104510 A JP S58104510A
Authority
JP
Japan
Prior art keywords
power supply
positive
vcc
output
load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20390281A
Other languages
Japanese (ja)
Inventor
Fumio Hori
堀 文夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP20390281A priority Critical patent/JPS58104510A/en
Publication of JPS58104510A publication Critical patent/JPS58104510A/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

PURPOSE:To attain a large output simply and to reduce heat loss, by connecting ground side of a load to a positive or negative terminal of both polarity power supply with a large input signal and connecting the ground of the load to the common point of the power supply with a small input signal. CONSTITUTION:When an input signal ei is smaller than a positive power supply Vcc, a switch circuit SW is connected to a common point (b) of both polarity power supplies Vcc, Vcc', and the amplifier acts like a conventional class B amplifier. When the signal ei is higher than the power supply Vc, the circuit SW is connected to the negative terminal (c) of the power supply Vcc'. When the signal ei is larger than the power supply Vcc', the circuit SW is connected to a positive terminal (a) of the power supply Vcc. Thus, the maximum output is four times in using the same power supply voltage. Since the power supply voltage is low with a small output and the power supply voltage is larger with a large output, the same efficiency as that at the maximum output can be obtained with the small output. Thus, the heat loss is small, and large output, high efficiency and low loss can be realized at the same time.

Description

【発明の詳細な説明】 本発明は電力増幅器に関し、大出力が簡単に得られ、且
つ熱損失の少ない電力増幅器を提供するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power amplifier, and provides a power amplifier that can easily obtain a large output and has little heat loss.

従来、電力増幅器として、第1図のようなり級増幅器が
ある。第1図において、1は大刀端子、2は出力端子、
Q、Q1’は電力増幅用トランジスタVcc、Vcc’
は正、負電源、RLは負荷抵抗、eiは入力信号、eO
は出方電圧である。
Conventionally, as a power amplifier, there is a class amplifier as shown in FIG. In Figure 1, 1 is a long sword terminal, 2 is an output terminal,
Q, Q1' are power amplification transistors Vcc, Vcc'
are positive and negative power supplies, RL is load resistance, ei is input signal, eO
is the output voltage.

この回路において、最大出力電力は電源電圧と負荷抵抗
によって決まり、次のようになる。
In this circuit, the maximum output power is determined by the power supply voltage and load resistance, and is as follows.

Po=CVac+Vcc’>2/BRL−−−−−−−
−−−(1)出力においては出力トランジスタQ1.Q
1′に大きな直流電圧か常時供給されているため、発熱
が大きくなり、効率は非常に悪くなる。また、大出力増
幅器になるほど発熱量が増えるため、その放熱装置が大
きくなり、高価なものとなる。
Po=CVac+Vcc'>2/BRL------
---(1) At the output, the output transistor Q1. Q
Since a large DC voltage is constantly supplied to 1', heat generation increases and efficiency becomes extremely poor. Furthermore, the higher the output power of the amplifier, the greater the amount of heat generated, and therefore the heat dissipation device becomes larger and more expensive.

本発明は、上記問題点を解決し、大出方が簡単に得られ
、且つ熱損失の少ない電力増幅器を実現するものである
The present invention solves the above-mentioned problems and realizes a power amplifier that can easily obtain a large output power and has low heat loss.

本発明の原理を第3図に示す。第3図においてSWは正
電源V c aの正側aと、正負電源Vcc。
The principle of the invention is shown in FIG. In FIG. 3, SW is the positive side a of the positive power supply V c a and the positive and negative power supplies Vcc.

Vcc’の中点すと、負電源Vcc’の負側Cの3接点
を切換えるスイッチ回路であυ、その他は第1図と同一
である。
The midpoint of Vcc' is a switch circuit for switching three contacts on the negative side C of negative power supply Vcc', and the rest is the same as in FIG. 1.

次に第3図の動作について説明する。入力信号ei が
正電源Vcc  より小さい時はスイッチ回路SWは正
負電源Vca、Vcc’の中点すに接続されており、こ
のときは第1図に示した従来のB級増幅器と同様に動作
する。一方、入力信号eiが正電源Vcc  よシ高く
なると、スイッチ回路SWを負電源vcc’の負側Cに
接続する0その結果、トランジスタQ1のコレクタ電圧
はvCC十vCC/ となシ、スイッチ回路SW1負電
源Vcc’、正電源VcaトランジスタQ1゜負荷RL
の経路で電流が流れる。
Next, the operation shown in FIG. 3 will be explained. When the input signal ei is smaller than the positive power supply Vcc, the switch circuit SW is connected to the midpoint between the positive and negative power supplies Vca and Vcc', and in this case it operates in the same way as the conventional class B amplifier shown in Fig. 1. . On the other hand, when the input signal ei becomes higher than the positive power supply Vcc, the switch circuit SW is connected to the negative side C of the negative power supply VCC'.As a result, the collector voltage of the transistor Q1 becomes vCC + vCC/, and the switch circuit SW1 Negative power supply Vcc', positive power supply Vca transistor Q1゜load RL
Current flows through the path.

また入力信号ei が負電源Vcc’より大きいCとな
ると、スイッチ回路SWが正電源Vcc の正側aに接
続され、トランジスタQ、′のコレクタ電圧はVcc+
Vcc’となり、スイッチ回路SW1正遁源Vcc、負
電源■CdトランジスタQ1′、負荷RLの経路で電流
が流れる。
Further, when the input signal ei becomes C larger than the negative power supply Vcc', the switch circuit SW is connected to the positive side a of the positive power supply Vcc, and the collector voltage of the transistors Q,' becomes Vcc+
Vcc', and a current flows through the path of the switch circuit SW1 positive source Vcc, the negative power source Cd transistor Q1', and the load RL.

この時の各部の電圧波形を第4図に示す。すなわち、こ
の回路の最大出力は次のようになる。
FIG. 4 shows voltage waveforms at various parts at this time. That is, the maximum output of this circuit is as follows.

Po=(2x(Vcc+Vcc’))/RL ・−−−
−(2)従って前記(1)式と比べると、最大出力は同
じ電源電圧で4倍になることがわかる。
Po=(2x(Vcc+Vcc'))/RL ・---
-(2) Therefore, when compared with the above equation (1), it can be seen that the maximum output is four times greater at the same power supply voltage.

従来、同じ′電源電圧で大出力を得る方法としてBTL
 接続があり、最大出力は同じ負荷、同じ電源電圧なら
最大出力はB級増幅器の4倍になることは良く知られて
いるが、この場合には同時に熱損失も同じく4倍になり
効率は全くB級増幅器と変わらない。ところが、第3図
に示す本発明の電力増幅器では、出力が小さい時は電源
電圧も低く出力が大きい時は電源電圧が高くなるだめ、
小出力(最大出力のK)では、最大出力時と同等の効率
が得られる。従って熱損失は約%となり、大出力、高効
率、低損失が同時に実現できる。
Conventionally, BTL was used as a method to obtain high output with the same power supply voltage.
It is well known that the maximum output is four times that of a class B amplifier with the same load and the same power supply voltage. It is no different from a class B amplifier. However, in the power amplifier of the present invention shown in FIG. 3, when the output is small, the power supply voltage is low, and when the output is large, the power supply voltage is high.
At a small output (maximum output K), the same efficiency as at maximum output can be obtained. Therefore, heat loss is approximately %, and high output, high efficiency, and low loss can be achieved at the same time.

第5図に本発明の具体的な実施例を示す。第5図におい
てR1,R1’ 、 R2、R2’は抵抗、Dl、D1
’D2 、 D2’ 、 Da 、 D3’はダイオー
ド、Q2,02’ は比較回路を構成するトランジスタ
、Q3 、 Q3’Q4 。
FIG. 5 shows a specific embodiment of the present invention. In Fig. 5, R1, R1', R2, R2' are resistances, Dl, D1
'D2, D2', Da, D3' are diodes, Q2, 02' are transistors forming a comparison circuit, Q3, Q3' and Q4.

Q4′はスイッチ用トランジスタ、vT、vr′は正、
負基準亀圧、その他は第1図と同一である。
Q4' is a switching transistor, vT, vr' are positive,
The negative reference tortoise pressure and other details are the same as in FIG.

次に入力信号ei が正電圧の場合の第5図の動作につ
いて説明する。入力信号ei が基準電圧vrより小さ
い時、バイアス用抵抗R2′によシトランジスタQ4′
がオンされているため、負荷電圧11は、トランジスタ
Q4’J−イオードD3′、正電源Vcc、)ランジス
タQ4、負荷RL の経路で流れる。次に入力信号ei
 が基準電圧vr  より大きくなると、比較回路を構
成するトランジスタQ2のエミッタに電流か流れ、この
電流がトランジスタQ3′のペースに流れるため、この
トランジスタQ3′がオンする。このトランジスタQ3
′に流れる電流は、ダイオードD2 を通って流れるた
め、今までオンしていたトランジスタQ4はオフになり
、さらに負電源Vac’の負側かアース電位に等しくな
るだめダイオードD3′は逆バイアスされ、自動的にオ
フとなる。従って、このときの負荷電流は12 は、ダ
イオードD2、トランジスタQ3′、負電源Vcc’正
゛醒源Vcc、出力トランジスタQ1、負荷RL  の
経路で流れ、負荷RLに大電流が供給できる。
Next, the operation shown in FIG. 5 when the input signal ei is a positive voltage will be explained. When the input signal ei is smaller than the reference voltage vr, the bias resistor R2' causes the transistor Q4' to
is turned on, the load voltage 11 flows through the path of the transistor Q4'J, the diode D3', the positive power supply Vcc, the transistor Q4, and the load RL. Next, the input signal ei
When becomes larger than the reference voltage vr, a current flows through the emitter of the transistor Q2 constituting the comparator circuit, and this current flows through the transistor Q3', turning on the transistor Q3'. This transistor Q3
Since the current flowing through Vac' flows through the diode D2, the transistor Q4, which had been on until now, is turned off. Furthermore, since the negative side of the negative power supply Vac' becomes equal to the ground potential, the diode D3' is reverse biased. It turns off automatically. Therefore, the load current 12 at this time flows through the path of diode D2, transistor Q3', negative power supply Vcc', positive wake-up source Vcc, output transistor Q1, and load RL, and a large current can be supplied to load RL.

なお、入力信号eiが負電圧の場合も全ての反対側の素
子が同様の動作をするので説明を省略する。
It should be noted that even when the input signal ei is a negative voltage, all the elements on the opposite side operate in the same manner, so a description thereof will be omitted.

以上のように本発明は入力信号レベルに応じて入力信号
が大きいときは負荷の接地側を正負電源の正側又は負側
に接続し、小さいときは正負電源の中点に接続するよう
にしだものであるから、同じ電源電圧で従来のB級増幅
器の4倍の出力が得られ、最大出力が同じなら熱損失の
少ない高効率増幅器が実現できる。
As described above, according to the present invention, when the input signal is large, the ground side of the load is connected to the positive side or the negative side of the positive and negative power supplies, and when the input signal is small, it is connected to the midpoint of the positive and negative power supplies. Therefore, it is possible to obtain four times the output of a conventional class B amplifier with the same power supply voltage, and if the maximum output is the same, a high efficiency amplifier with less heat loss can be realized.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の電力増幅器の回路図、第2図は第1図の
各部の波形図、第3図は本発明の原理をである。 1・・・・・・入力端子、2・・・・・・出力端子、Q
、、Q1’・・・・・・電力増幅用トランジスタ、Q2
.Q2I・、・・、・比較回路を構成するトランジスタ
、Q3.Q3’、Q4゜94’、D2.D2’、Da、
D3/  ・・・・・・スイッチ回路を構成する素子、
RL・・・・・・負荷、VCC・・・・・・正電源、V
cc’  ・・・・・・負電源。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名襖1
図 第 2(!I 13図 靭5図
FIG. 1 is a circuit diagram of a conventional power amplifier, FIG. 2 is a waveform diagram of each part of FIG. 1, and FIG. 3 is a diagram showing the principle of the present invention. 1...Input terminal, 2...Output terminal, Q
,,Q1'...Power amplification transistor, Q2
.. Q2I..., transistor constituting the comparison circuit, Q3. Q3', Q4°94', D2. D2', Da,
D3/... Elements constituting the switch circuit,
RL...Load, VCC...Positive power supply, V
cc' ・・・・・・Negative power supply. Name of agent: Patent attorney Toshio Nakao and 1 other person
Figure 2 (!I Figure 13 Utsubo Figure 5

Claims (1)

【特許請求の範囲】[Claims] プッシュプル接続された電力増幅用トランジスタと、直
列後続された正負電源と、上記電力増幅用トランジスタ
の出力端に接続された負荷の接地側を上記正電源の正側
と負電源の負側と上記正負電源の中点、に切換え接続す
るスイッチ回路と、上記電力増幅用トランジスタの出力
電圧と基準電圧とを比較し、出力電圧が基準電圧を越え
ないときは上記負荷の接地側を上記正負′電源の中点に
接続し、上記出力電圧が基準電圧を越えたときに上記負
荷の接地側を上記正電源の正側又は負電源の負側に接続
するよう上記スイッチ回路を切換える比較回路とを備え
た電力増幅器。
A push-pull connected power amplification transistor, a positive and negative power supply connected in series, and a ground side of a load connected to the output terminal of the power amplification transistor are connected to the positive side of the positive power supply, the negative side of the negative power supply, and the above. Compare the output voltage of the power amplifying transistor with the reference voltage and the switch circuit connected to the midpoint of the positive and negative power supplies, and if the output voltage does not exceed the reference voltage, connect the ground side of the load to the midpoint of the positive and negative power supplies. a comparison circuit that is connected to the midpoint and switches the switch circuit to connect the ground side of the load to the positive side of the positive power supply or the negative side of the negative power supply when the output voltage exceeds the reference voltage. power amplifier.
JP20390281A 1981-12-17 1981-12-17 Power amplifier Pending JPS58104510A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20390281A JPS58104510A (en) 1981-12-17 1981-12-17 Power amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20390281A JPS58104510A (en) 1981-12-17 1981-12-17 Power amplifier

Publications (1)

Publication Number Publication Date
JPS58104510A true JPS58104510A (en) 1983-06-22

Family

ID=16481596

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20390281A Pending JPS58104510A (en) 1981-12-17 1981-12-17 Power amplifier

Country Status (1)

Country Link
JP (1) JPS58104510A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02262192A (en) * 1989-03-31 1990-10-24 Sony Corp Liquid crystal display device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02262192A (en) * 1989-03-31 1990-10-24 Sony Corp Liquid crystal display device

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