JPS58100187A - Musical composition performer - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a music playing device, that is, a device that stores music information including at least scale data and note length data as bit patterns in a semiconductor memory (2) and plays music according to this music information. It is a device that can play from any point in a piece of music and repeatedly stop at the 0° point.

When learning music or using this device for "karaoke," it is desirable to repeatedly play a song from arbitrary points to arbitrary points at various times. In view of the fact that music information stored in memory is sequentially read out by designation of an address counter, the present invention instantly presets this address, accurately detects a stop address, and easily performs repeated performances. .

An embodiment of the apparatus of the present invention will be described below with reference to the drawings.

-First, the overall configuration will be explained. FIG. 1 is a circuit block diagram of the device.

<Overall Configuration> The device is roughly divided into an oscillation/frequency dividing circuit 1, a tone generator section 2, an envelope generating section 3, an external input circuit 4, a control circuit 5, an address counter, a song information memory 7, an amplifier 9. It is composed of a speaker 10.

The oscillation/frequency divider circuit 1 includes, for example, a crystal oscillation circuit and a frequency divider circuit, and generates a basic clock for the device. The tone generator section 2 is a section that generates a corresponding frequency signal in accordance with data output from a music information memory 7 (for example, a ROM, etc.). The envelope generator 3 generates the length and envelope of the sound according to the data output from the music information memory 7. The input circuit 4 is a switch circuit that controls music selection, music start, transposition/modulation, tempo, etc. Control circuit 5 is input circuit 4
The switch input of ° is converted into a signal and transmitted to each block. The address counter 6 specifies the address of the music information memory 7, and sequentially reads the music data stored in the music information memory 7.

FIG. 2 shows the bit allocation stored in the music information memory 7. In other words, the 16 bits of Bo"Bts each correspond to B, ~B3 (4 bits)... scale focus B4~
B7 (4 bits)...Note length focus Ba, Be
(2 bits)...Octave bit B1G+
Bu (2 bits)...Instrument recombination focus B1□
, Bt3 (2 bits)...Sound strength bit B1
4 (1 bit)...Sound effect bit Bus (1 bit)
(bit)...Allocated like a stop bit.

1) First, select a song using the 40 song designation switches in the input circuit. By operating this switch, the control circuit 5 outputs the 3-bit pattern decoded into M1 to M3, and designates the top address of the music information memory 7 for reading.

2) Next, when you turn on the start switch of input circuit 4,
The music information bit pattern at the address specified above is read. Among the read bit patterns, B
, ~B3 (scale bit).

The 8 bits from B8 to Bll (octave bits, instrument recombination bits) are sent to the tone generator section 2, and
B4-B7 (note length bit), BIG-B1. Eight bits (instrument recombination bit, sound strength bit, sound effect bit) are transmitted to the envelope generator 3.

B15 (stop bit) is transmitted to the control circuit 5. When "l" is output to the B15 bit, the operation stops, but at the time of starting and playing music, it is "0" and does not affect the operation in any way.

3) Of the 8 bits transmitted to tone generator section 2, BONB! , B11. The 6 bits of Be are input to an adder/subtracter circuit 2-6, specifying an address in a scale frequency division ratio memory 2-5, and an octave selected by an octave selector 2.

The adder/subtracter circuit 2-6 receives signals B0 to B3 . Transpose and control the data of B, , B,
This allows for modulation.

4) Fundamental frequency f corresponding to each octave by octave selector 2-2. 1""f04 is selected. The frequency divider circuit 2-1 is connected to the 5 oscillation/divider circuit, and prepares a fundamental frequency of 7ot-104't'', which is twice (1°2.4.8 times) the binary output thereof.

Fundamental frequency f selected from octave selector 2-2
oi is input to the frequency dividing circuit 2-3 and frequency-divided. The 9-bit binary frequency divided output of the frequency dividing circuit 2-3 is output from the matching circuit 2-4.
, the division ratio memo specified by the L address!
It is compared with the same 9-bit division ratio output from J-2-5, and when they match, a pulse is output and the frequency divider circuit 2
-Reset 3.

The frequency of the pulses output at the time of this coincidence corresponds to each scale in each octave.

By the way, if the frequency division ratio is 12 values between 478 and 253 (expressed by 9 pits in binary code) for a reference frequency of 500 KHz, then it is 1046 to 19.
Each scale frequency in the 75 Hz range can be obtained. The octave can be changed by doubling the reference frequency.

5) The coincidence detection pulse is further input to the frequency dividing circuit 2-7. The frequency divider circuit 2-7 uses its 4-bit binary frequency divided output to memorize the next stage basic waveform! The address of j-2-8 is specified. That is, the frequency dividing circuit 2-7 operates as a so-called address counter.

Basic waveform memo! J-2-8 has an 8-bit configuration and stores data so as to form a waveform corresponding to one cycle of the scale frequency in 16 steps. That is, the frequency output from the octave selector 2-2 and the -number circuit 2-4 corresponds to 16 times the actual scale frequency, and the frequency output from the frequency divider circuit 2-4 corresponds to 16 times the actual scale frequency.
-7, one cycle of each scale frequency is divided into 16, and the addresses of 16 steps in the basic waveform memory 2-8 are sequentially designated. The waveform data read out by this addressing is input to the D/A converter 2-9, where it is D/A converted to form the basic waveform of the sound signal.

Also, basic waveform memo! j-2-8 has song information memory 7
2 bits of BIG e Bll and the upper 2 bits binary frequency divided output C of the frequency dividing circuit 3-7 of the envelope generating section 8 are inputted. The 810+Bll bit selects the waveform memory to be read out according to the instrument recombination control, and the C 2-pin further divides the envelope into predetermined regions in time, and selects the basic waveform with higher-order frequencies added as appropriate. This is to increase the naturalness and ease of listening to the sound.

6) Regarding the 8 bits transmitted to the envelope generator 3, the 4 bits -B and ~B7 are stored in the note length frequency division ratio memory 8-
6 as an address specification. 13to IB
The 2 bits of 11 are control bits for instrument recombination and are stored in the envelope waveform memory 3-8.
The 3 bits of 3eB14 are input to the arithmetic circuit 3-9 as the strength-1 sound effect (tremolo) control bit.

7) In the envelope generating section 8, when the start switch is turned on, the frequency dividing circuit 3-1 starts operating first. The 6-bit binary frequency division output of the frequency divider circuit 8-1 is output from the matching circuit 8-2.
Input and tempo division ratio memo! It is compared with the 6-bit frequency division ratio output of j-8-8. If they match, a pulse is generated and input to the subsequent frequency divider circuit 3-4. This pulse determines the time interval of the shortest note length.

If necessary, by operating the tempo control switch of the input circuit 4, the division ratio memo is entered in the addition/subtraction circuit 3-II! j-8
By adding or subtracting the -80 frequency division ratio output, you can change the frequency division ratio and set an arbitrary tempo.

8) Note length division ratio memo! j-3-4 selects and outputs 8-bit division ratio data corresponding to each note length using 4 bits B4 to B7 as addresses.

Accordingly, in the matching circuit 3-5, the frequency dividing circuit 3-4
It is compared with the 8-bit binary frequency division output of , and outputs a pulse when they match. The output time interval of this pulse is B4~
This corresponds to each note length specified by the 4 bits of B7.

However, here as well, 32 pulses are output for each note length for the following reasons. That is,
- The frequency of the pulses output from the circuits 8-2, 8-5, etc. is usually 32 times that of the general case. This pulse is input to the frequency dividing circuit 3-7 and frequency-divided.

9) The envelope waveform memory 3-8 stores data so as to form one envelope waveform with an 8-bit configuration and 32 steps. Enbe.

Like the basic waveform described above, the rope waveform is only compressed and expanded in time for each note length, and one envelope waveform must be read out for one note length. Frequency dividing circuit 3-7
becomes the so-called address counter for envelope waveform memory 3-8, and by outputting 5-bit binary frequency division, the envelope waveform memory 3-8 becomes % per note length.
The addresses of 32 steps of 8 are specified sequentially.

Envelope waveform memo') -BIG input to 8-8
+Bll bit selects the waveform memory to be read, basic waveform memo! It is combined with the basic waveform selected in J-2-8 to perform musical instrument recombination control. The higher level of the 5-bit binary frequency division output of the C 2-bit frequency divider circuit 3-7 divides the envelope period into four equal parts.

10) The data read from the envelope waveform memory 3-8 is multiplied in the arithmetic circuit 3-9 based on the strength bit data of B12 and B13, and the acoustic effect of B14 (
Tremolo) Performs addition and subtraction based on the bit data and modifies the envelope waveform booter. The modified data is D/A-y, i-z<-E 8-1
It is converted to 0 fD/A and generates an envelope.

+1) The envelope is sent as a level control signal to the D/A converter 2-9 of the tone generator section 2, mixed with the basic waveform by the D/A converter 2-9, and outputted as an enveloped sound signal. The sound signal is from amplifier 9,
Sound is emitted from 10tJi speakers.

12) When the frequency dividing circuit 3-7 counts 32 steps (one envelope read), the carry pulse is input to the address counter 6 and advances the address by one. From this K, the next music information bit pattern is read out from the music information memory 7, and the operations 1) to 12) above are repeated.

13) In this way, from the song information memory 7 to 1llrf
Read the next song information bit pattern", I'(1
5 hits, a stop signal is output from the control circuit 5, and each frequency dividing circuit 2-1, 2-8.
2-7.3-1.8-4.8-7 is reset, the internal gate circuit is closed, and the series of operations is completed.

<Data Capacity of Memory> Incidentally, the data capacity of each memory in the above embodiment is as follows.

Scale division ratio memory 2-5...9 bits )+6=
(4 x 4) Basic waveform note length division ratio memory 3-3 ...... 8-pitch 1-XI shortest note length note length division ratio memory 3-6 ...... 8 bits x 16 notes envelope waveform memory 3-8...8 bits x 32 steps x 4 envelope waveform (generation of musical instrument sound (timbre)) A tone is composed of an envelope and the fundamental waveform that forms the envelope. By specifying an envelope, a desired musical instrument sound can also be specified.

The data specifying the instrument sound is the instrument recombination pitch B16 m Bo output from the song information memory 7,
Here, the instrument sound can be switched for each note at most. The data of the musical instrument recombination bits B1° and B1 are input to the basic waveform memory 2-8 and the envelope waveform memory 3-8, and the corresponding basic waveform and envelope waveform are selected. Basic waveform examples are shown in Figures 3 (a) to (d), and envelope waveform examples are shown in Figures 4 (1) to 4.
As shown in the time chart (4'), for example, the basic waveform A shown in FIG. 3(C) is the envelope 1.
If the waveform B shown in Figure 4 (2) is selected,
An instrument sound having a waveform as shown in FIG. 5 is output.

The 2-bit C signal input to the basic waveform memory 2-8 increases the naturalness of the sound and the ease of hearing it. The combination of basic waveforms may change within one envelope. In general, the typical envelope 1 shown in FIG.
As shown in the waveform, the time from the rise of the sound to the peak is attack time A, and the time from peak to hold level/
When the time to V is at Decay Timelo 1 retention level i
ll Sustain time S, release time of fall
This is called time R, and the basic waveform can also change during these periods. In this embodiment, the envelope period is equally divided into four parts using a 2-bit C signal and approximated to 7 parts. The basic waveform can be changed in various ways, such as slight changes by adding higher-order frequencies, or a certain period of a certain musical instrument sound having a completely different basic waveform.

<Repetition of music performance> FIG. 6 shows the details of the six address collars.

The address counter 6 is a presetter pull counter 6-1.
, a stop address storage register 6-2-1, a start address storage register 6-2-2, a gate circuit 6-3, and a -number circuit 6-4.

When a switch for specifying a repeat start address in the input circuit 4 is operated while the music is being played, a pulse P1 is generated from the control circuit 5 and the start address storage register 6-2-
2 is input. By inputting this pulse P1, the output of the presettable counter 6-1 (the so-called bit pattern of the address specifying the read position of the music information memory 7) when the switch is operated is changed to the start address storage register 6-1.
2-2.

Next, when the music performance reaches the point where you want the repetition to end, when you again operate the switch for specifying the repetition stop address in the input circuit 4, a pulse P2 is generated from the control circuit 5, and the stop address storage register 6-2- 1. The signal is input to the gate circuit 6-3 and the presettable counter 6-1. First, by the first pulse, the output of the presettable counter 6-1 is transferred to the stop address storage register 6-1.
-1 and stored. No. 2 (1 pulse opens gate circuit 6-3 with latch function, - number circuit 6-4
(7) Enables content comparison between brisset tag, counter 6-1 and stop address storage register 6-2-1. The third pulse is supplied to the presettable counter 6-1 as a preset enable signal P3 via the OR gate OR, and presets the contents of the start address storage register 6-2-2 in the presettable counter 6-1. .

In this way, when the switch for specifying the start address and stop address is repeatedly operated while the music is being played, the start address is stored in the start address storage register 6-2-2, and the stop address is stored in the stop address storage register 6-2. -1, respectively, and the start address is preset in the presettable counter 6-1 by operating the switch for specifying the stop address. These switch operations are performed during musical performance.

When the start address is preset in the presettable counter 6-1, the 5-piece information memory 7 is read out again from this address, and the presettable counter 6-1 is sequentially counted up and down each time the note period ends. Play the song. When the address specified by the presettable counter 6-K matches the contents of the stop address storage register 6-2-1, a pulse is output from the minus number circuit 6-4, and a preset enable signal P is output via the OR game FOR.
3 as a presettable counter 6-IK: supplied. This preset enable signal P3 allows the contents of the start address storage register 6-2-2 to be preselected into the presettable counter 6-1 again.

As described above, in this example, a desired period can be repeatedly played by simply operating the switch for specifying the start address and the stop address while the music is being played.

In this example, the repetition start is performed immediately in synchronization with the detection of the stop address, but a repetition start switch is separately provided in the switch circuit 4, and by operating this switch, the start address storage register 6 is set at the time of (;ifi). −
The contents of 2-2 may be preset in the presettable counter 6-1. In this case, it is necessary to stop the count-up of the envelope 1 generating circuit 3 by the output of the minus number circuit 6-1.

If you want to stop repeating, operate the repeat canceling switch in switch circuit 4, and press the je from control circuit 5.
/S/SR is generated and the stop address storage register 6
-2-1, the start address storage register 6-2-2, the gate circuit 6-3, and the -number circuit 6-4 may be reset. It is also easy to set the number of repetitions in advance. For example, this is the control circuit 5
The number of repetitions is set in advance through the input 11 circuit 4, etc.
Furthermore, this can be easily realized by counting the number of pulses output from the minus number circuit 6-4 and outputting the pulse R when the counted number becomes equal to a set number of times.

As described above, the present invention makes it possible to set the start address and stop address of a song and easily and immediately repeat the performance from any point to any point. “A useful music playing device can be created when used in closed spaces.

[Brief explanation of the drawing]

FIG. 1 is an overall circuit block diagram showing one embodiment of the present invention, FIG. 2 is a diagram showing bit allocation of music information memory, and FIGS. 3(a) to (d) are time charts showing examples of basic waveforms. , Figures 4 (1) to (4) are time charts showing examples of envelope waveforms, Figure 5 is a time chart showing examples of mixing basic waveforms and envelope waveforms, and Figure 6 is a more detailed explanation of the main parts of Figure 1. FIG. 2 is a circuit block diagram shown in FIG. DESCRIPTION OF SYMBOLS 1... Oscillation/frequency division circuit, 2... Tone generator section, 3... Envelope generation section, 4... Input circuit, 5... Control circuit, 6... Address counter, 7. ... Song information) Memory 16-1... Preset tag counter, 6-2-1... Register for stop address storage, 6-2-2... Register for start address/jfi, 6-3... Gate circuit, 6-4... Coincidence circuit, B, ~B3... Scale bit, B4-B7...
Bits to notes. Agent Patent Attorney Aihiko Fukushi / 6 Bit Figure 2

Claims (1)

[Scope of Claims] 1. In a device that stores music information having at least scale data and note length data as bit patterns, reads out the music information sequentially according to the designation of an address counter, and plays the music according to the music information, comprising: A register for setting a start address and a stop address of a bit pattern at a point to be repeated, and a means for presetting a start address in the address counter when the designated address of the address counter matches the stop address, A music playing device characterized in that it is configured to enable repeated playing from any point to any point.