JPS58130385A - Electronic musical instrument - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention]

The C/+ invention relates to an electronic musical instrument suitable for use in multiple units. In recent years, as an electronic organ (W1 child instrument) used for teaching, etc., a magnetic tape recording data related to the performance is attached to the bottom of the sheet music, and the data on this magnetic tape is read and automatic performance is performed. Alternatively, an electronic organ has been developed that tells the practitioner which keys to press on the keyboard. By the way, it is common for electronic organ practitioners to repeatedly practice particularly difficult phrases and the like. Therefore, the Prince Organ for practice can automatically play any phrase specified by the practitioner.
(For example, it is preferable to be configured to instruct the key press position t!It). Therefore, the present invention provides an electronic musical instrument that can automatically play back any section specified by the learner.
a data storage section, a writing means for writing data related to the performance of a musical piece into the data storage section, a section specifying section for specifying a section to be played back, and a section specifying section designated by the section specifying section.
a section information storage part that stores information corresponding to the sections T;
Based on the information contained in the C/J section information period 11 and 11, a means for reading out data related to hair in the section specified by the section specifying means from the data record tM. and a reproduction means for reproducing the data successively produced by the successive reproduction means, and the reproduction means generates the musical tone of the musical piece corresponding to the interval specified by the section 111 designation means. It is designed so that detailed instructions can be cut off. Hereinafter, v[I! A detailed explanation will be given with reference to T. ! / The figure is a small) Invented Prince Organ (Prince Musical Instrument)
It is a block diagram of QJ@or2. In Figure 1, which explains the outline of this Prince's organ, the parts indicated by the symbol @l are musical instruments. As shown in FIG. ing. This magnetic key 12 (Fig. 1 shows a pitch code indicating the pitch of each note of a B-T music piece, a note length code (rest) with a pupil corresponding to the note length of each note or rest. The pitch code of the note is "θ"), the chord hood indicating the chord name and the T phrase end mark indicating the end of each phrase are shown in Figure 11!3 in the order of progression of each piece according to the recording format.
At the same time, the end of the music data consisting of pitch chords, note length chords, chord chords, and phrase end marks is recorded by a Suiko finish mark. Also, after this finish mark, the music data is stored in ltAM (Random Access Memory) B&:
T start address data indicating the start address of each phrase at the quantity ratio AM8 when 411 iF is loaded is also recorded according to the T format shown in FIG. Then, when this Raku-1 is run from the predetermined position of the reading groove provided on the 7311 child organ to the predetermined position fi![, each data on the magnetic tape 2 is sequentially read, and the read data is Of these, the song data before the finish mark is sequentially written to the RAM 8 shown in the figure Wp, as shown in FIG. tl in RAM4
The data are sequentially written as shown in Figure Aq (b). Next, when playing music using the musical tone data that has been damaged in RAM 8, (5) Normal playback mode (the key to repeat playback mode is 1). (5) Play music in normal playback mode. To do this, open the repeat switch 5 (alternate type switch) in Fig. 1, then press the start/stop switch 6 (momentary type push button switch) - - T0.
As a result, the desired music data is sequentially stored in the RAM 8. Based on this readout data, all the music pieces shown in FIG. 1 are automatically played.
The #l (keys) to be pressed on the keyboard are sequentially indicated by lamps provided corresponding to each key in the order in which the music progresses. The 811 person practices key operations σ] according to KobiJ's instructions. Then, when the automatic performance of all songs and the key press instruction are completed once, the automatic performance and the pressing of the keys are automatically stopped (they are not repeated). On the other hand, (B)! When playing music in the J-speed playback mode, first close the repeat switch 5, then press the phrase finger/foot switch (in this embodiment, specify the desired phrase by phrase number).
Press the set switch 7 (momentary push button switch) while pressing the key switch provided corresponding to each key on the keyboard.

[Press T0 72 operations like this, desired T
If the phrases are played in the desired order (this order of performance may be random), then 1(,A
In M8, the phrase numbers of the desired phrases are shown as shown in FIG.
#Write sequentially in order (The first phrase (c) is the first phrase,
Play the 17th race, the 3rd phrase, the 3rd phrase, and the 3rd phrase in this order, and phrases like Katsuko U]
sQf shows one line of performance repeated). Next, press the start/stop switch 6 for a moment, and the AM8
According to the sequential order of phrase numbers stored in R, the music data of phrases corresponding to these phrase numbers are
An automatic performance is performed based on the data read out from AM8, and the performance is repeated until the start/stop switch 6 is pressed again. Below are the details of this electronic organ. First, the music data uJk2 format on the magnetic tape 2 will be explained in detail with reference to FIG. In FIG. 3, arrow Y indicates the upstream direction of the music data being recorded (T71j, that is, the running direction of the magnetic tape 2 when reading music data from the magnetic tape 2). As shown in the figure, as the song data is recorded on the magnetic tape 2, the song data corresponding to the IB/phrase of this song is first recorded as the first note q) note m+indicated in the first phrase. T pitch food Kusu 1〉, first U
]Chord name P E T chord chord (Sl), T note length code (Sl) indicating the note length of the first note, pitch code of the C-th note (S2'). The note length code of the last note in this @phrase is followed by the note length code of the last note in this @l phrase. Even though the phrase end mark <pt> of Vt bit indicating the end of the chord phrase is recorded, the recording is still interrupted at the point where the chord whitening is required. below,
Following this @/l phrase corresponding T song data, T song data corresponding to the 3rd cophrase, and T corresponding to the 3rd phrase.
The music data, .
t>, <P,>, ... <Pn) are recorded. In this case, the phrase end mark <Pt> indicates the end of the first phrase, the phrase end mark <Pj> indicates the end of the 17th ray, and the phrase end Y - ri (P
n > My own song (lJ last (/J phrase 14
It marks the end of 17 races. Next to the 7-race end mark (Pn), a TI bit finish mark indicating the end of the music data is recorded. Matakol
/I 61 after the finish mark, and if the music data before this finish mark is stored in RAM 8 in FIG. 1, each start address of the discipline area corresponding to each phrase in LAMa Bit U
3. The starting address data is the music data of the first phrase, the starting address data of the area where t is stored <Pl>, the starting address data of the area where the music data of the 3rd cophrase is stored <P,>,... River/nth phrase (/J H Start address (Pn) of the area where song data is stored c++
It is recorded in phrases like this. Note that the above-mentioned musical tone data and start address data are recorded as serial data. Next, let's talk about the keyboard of this electronic organ! It's 9pm. FIG. 5 is a T diagram showing the keyboard of this electronic organ.
Near the front edge of 10..., there are ■
,■),■,°...There is a buzz about the phrase building number. These 11 phrase numbers are marked white #! 10.10-
...These are white & I! Key switches provided for each of l O and l o-c

[Used when used as a phrase specification switch. Also, each white key 10, 10... and each black a of this keyboard 9
Near the rear end of ll, 11... is the 1 key press position [indication T
A lamp (or a light emitting element such as a light emitting diode) IB, 1, etc. is provided for illumination. Next, referring again to FIG. 1, the reading device 1B uses a magnetic head disposed in a reading groove provided at an appropriate location of this electronic organ, and uses the magnetic head to read the magnetic tape.
a serial/parallel conversion unit that converts each bit of data rtt serially read from rtt into parallel data DATA and outputs it; an address counter 181 that also generates address information ADDM necessary when writing the parallel data to DATAIRAM8 or RAM4; , a write command generating hole that issues a write command to the RAM 8 or RAM 4, and a finish mark detection unit that detects a finish mark from the music data read by the magnetic head. Next, RAM8 is RAM for storing music data P.
M%RAM4 is R for storing start address data.
The R/W control circuit 14 is a circuit that performs write control and read control of the RAM 8, and the R/WIIJ control circuit 15 is a circuit that performs write control and read control of the RAM 4g. Here, when the operator moves the musical score l from a predetermined location to a predetermined location in the reading groove, the serial data recorded on the magnetic tape 2 is sequentially read and output as parallel data DATA. In this case, the reading device 18 clears the address counter 18art to zero and sets the address information ADDR1rt to "0" immediately before reading the music data starts. This address information ADDR is the R/Wll11 circuit 141
2 is supplied to the address input terminal 1000 of AM8 through the address input terminal 2. Next, the reading device 1t l 8 it s pitch code <sl> corresponding to the first note of the first f bi''/)T, that is, II/phrase in the music Fkh data.

[Parallel data D
When output starts as an AT person, a write command is issued to RAM8. At this time, parallel data DATA corresponding to the pitch code (sl) is sent to the data input terminal DI of RAM8.
is being supplied, the pitch code <Sl> is written in <0> of the RAM 8 (see Fig. Increment node Tru0 This result 1 (
, AM8 are supplied with rlJ at their address input terminals A. Next, the reading device IB reads the second t in the song data.
When bit T (that is, chord chord stop) starts outputting, RA
A write command is sent to M8. As a result, <1 of RAM8
>The chord code ゛(sl) is written at the address. Thereafter, in the same manner, the music data C including the place end mark read from the magnetic tape 2 are sequentially written into the RAM 8 as shown in FIG. SI4' (A). When the finishing mark is read into the reading device 1B, the reading device 18 writes this finishing mark into the ERAM 8, clears the address counter 18, and thereafter uses the address information ADDRIR/W control circuit IJ control. RAM
4 address input terminal A. Next, the reading device 18
is the first S bit in the a priori address data, T, that is, the start address <PI> of the music data storage area corresponding to the first phrase in RAM5 (in this case, "O
”) as parallel data DATA and RA when running.
Issue a write command to M4. At this time, the parallel data DATA corresponding to the start address <Pt>K is supplied to the data input terminal DI of the RAM4.
The head address <Pl> is written to the <0> address of (see FIG. V (b)). The 0 read and store 13 increments the address counter 13m when this write operation is completed. Next, the reading device 13 reads the odd S bit in the start address data, that is, the start address < Ps
> When you start outputting (value "i" in this case), the RAM
Issue a write command to 4. As a result, -<1 of RAM4
The start address <P2> is written to the address <P2>. In the same manner, the leading address data read from the magnetic tape 2 is sequentially written into the RAM 4 as shown in FIG. 9(b)K. The above is the process by which the music data and the leading address data of the magnetic tape 2 are written into the RAM 3 and the RAM 4, respectively. Next, the case where music is played back based on the music data written in the RAM 3 will be explained. First, the case of the prison normal playback mode will be explained. First, the outline of each component that operates in the prisoner normal playback mode will be explained. In FIG. 1, the data discrimination/distribution circuit 16 determines whether the parallel data sequentially supplied from the RAM 3 is a pitch code, a chord code, a note length code, a phrase end mark, or a finish mark. If the data is a pitch code, it outputs the same data from the seventh data output terminal DOI and outputs a signal N T (%1N). If the data is a chord code, the same data is output from the first data output terminal Dog, and a signal CH ('1
' pulse signal) is output, and if the data is a note length code, the same data is output from the third data output terminal DO3, and a signal LN ('1'17 pulse signal) is output, and the data is a note length code. If the data is a phrase end mark, only the signal PE (1)/rus signal) is output; if the data is a finish mark, the signal FN (10) is output.
) and pulse signals) are output. The melody pitch register 17 is connected to the data discrimination distribution circuit 16.
This is a rounded register that temporarily stores the pitch code output from the key press display device 18 and the melody tone forming circuit 19, respectively. The pressed key display device 18 includes a decoder that decodes the output (pitch code) of the melody pitch register 17, amplifiers as many as keys that amplify the outputs of this decoder, and lamps 12 driven by the outputs of these amplifiers. .12,・
When a pitch code is output from the melody pitch register, the lamp 12 of the key corresponding to the same pitch code lights up.0 Melody tone forming circuit 19 is the melody pitch register 17
The output (pitch code) has a pitch (frequency) corresponding to the output (key code KC) of the keyboard circuit 20, and is specified by the tone designation switch provided on the operation panel (illustrated path) K of this electronic organ. A musical tone signal having a dull tone and an envelope is formed and outputted to a speaker 22 via an amplifier 21. The keyboard circuit 20 includes each key 10, 10, . . . of the keyboard 9.
. . , 11.11, . . . It is a circuit comprising key switches for detecting nine key operations, and an encoder for encoding the output of each of these key switches. Key code KC corresponding to the pitch of the key
The on-n-jista 23 is designed to output the sum;
This is a register for temporarily storing the chord code output from the data discrimination and distribution circuit 16, and its output is supplied to the accompaniment tone forming circuit 24. Reference numeral 25 is a tempo clock generator that generates an arbitrary 14-period tempo clock T-CLK, which is the basis of the performance tempo of a song.An automatic pattern signal generation circuit 26 generates an accompaniment based on this tempo clock T-CLK. It generates a first pattern signal necessary for generating a sound and a first pattern signal necessary for generating a rhythm sound, and the first pattern signal is sent to the accompaniment sound forming circuit 26. The accompaniment tone forming circuit 24 generates a nine accompaniment tone signal using the chord corresponding to the chord code supplied from the chord register 23, and the first pattern signal is supplied to the rhythm sound source circuit 27. The rhythm sound source circuit 27 is a circuit that generates and outputs according to the first pattern signal supplied from the generation circuit 26, and the rhythm sound source circuit 27 generates nine rhythms specified by a rhythm designation switch (path shown) provided on the operation panel of this electronic organ. This circuit forms and outputs a rhythm sound signal for generating a rhythm sound corresponding to the rhythm sound according to the first pattern signal supplied from the automatic pattern signal generation circuit 26. The accompaniment sound signal output from the accompaniment sound forming circuit 24 and the rhythm sound signal output from the rhythm sound source circuit 27 are mixed into the musical sound signal output from the melody sound forming circuit 19. Next, the note length register 28 is a rounding register that temporarily stores the note length code output from the data discrimination distribution circuit 16, and its output is supplied to one data input terminal DII of the comparison circuit 29. 30 note length counter
Tempo clock T-CL supplied to the clock input terminal CK
A counter for counting K is used, and its counting output is supplied to the other data input terminal DI2 of the comparator circuit 29. The comparison circuit 29 compares the data supplied to the data input terminal DI IK with the nine data supplied to the data input terminal DI 2, thereby determining the symbol corresponding to the note length code stored in the note length register 28. This is a companion device provided to detect whether or not a long time has elapsed.If both data supplied to the data input terminals DII and Dll are equal, a signal IQ (1 minute) is output from the comparison output terminal C. output). Here, a description will be given starting from the state immediately before music playback starts in the four normal playback modes. In this case, the trigger flip 70 knob indicated by reference numeral 31 is in the reset state and
Therefore, the signal pLAypo' is output from the set output terminal Q of the trigger flip-flop 31. The signal PLAY is sent to the melody pitch register 17 and the chord register 2 through inverters 32, 33, and 34, respectively.
3. It is supplied to each reset input terminal R of the automatic pattern signal generation circuit 26. Therefore, the 11" signal is not supplied to each reset input terminal R of the melody pitch register 17, the chord register 23, and the automatic pattern signal generation circuit 26. As a result, these melody pitch registers 1
7. Chord register 23, automatic pattern signal generation circuit 26
are all in a reset state. Further, in this case, the repeat switch 5 is in the open state, and therefore the signal ngpEATfo" is generated. This signal RE
PEAT sends the output data of RAM4 to the R/W control circuit 1.
Gate circuit 3 for transferring data to the data input terminal DI of 4
It is supplied to the enable input terminal E of 5. Therefore, in this case, the gate circuit 35 is in the cut-off state, and sb, R/W
A value "0" is supplied to the data input terminal DI of the control circuit 14. The signal REPEAT is inverted by the inverter 361C and supplied to one input terminal of the AND gates 37 and 38.゛Now, in the above state, when the operator presses the start/stop switch 6 for a moment, while the start/stop switch 6 is closed, a signal is sent to the differential circuit 400A power terminal and the trigger input terminal T of the trigger flip-flop 31. Each outputs a 0 minute signal to which a %11 signal is supplied and supplies it to one input terminal of an AND gate 41. On the other hand, when the trigger 7 lip 7 4-tub 31 is supplied with the 1 minute signal from the start/stop switch 6, it becomes set state at the rising edge of the signal, resulting in a signal pLA.
The signal PLAY, which is changed from the yfo' signal to the 11# signal, is changed to the 11' signal by the melody pitch register 1°7.
, the chord registers 23 are released from the reset state and put into an operable state, and the automatic pattern signal generation circuit 2
6 starts operating. Also, at this time, the output of the reset output terminal Q of the trigger flip-flop 31 becomes the output signal 1 or vO'. The output of this reset output terminal:fQ is supplied to the other input terminal of the AND gate 41 via the delay circuit 42. Here, the delay circuit 42 delays the signal using the system clock φ of this electronic organ, and the delay time is slightly longer than the pulse width of the pulse signal outputted by the differentiating circuit 40. . Therefore, in this case, from the output terminal of the AND gate 41, a pulse signal of the same timing dll as the pulse signal corresponding to the rising edge of the input signal of the differentiating circuit 40 of the two pulse signals outputted by the differentiating circuit 40 is output. Δ5TRTl is output. This pulse signal Δ5TRT is applied to the AND gate 3
8 is supplied to the other input terminal. As a result, a Hals signal of 1 is output from the output terminal of the AND gate 38, and this pulse signal is supplied via the OR gate 43 to the Bricella input terminal PS of the W control circuit 14. When a pulse signal of dI' is supplied to the preset input terminal PS, the Rh control circuit 14 converts the data (in this case "0") supplied to the data input terminal DIK to
The address counter 14aK provided in this R4 control circuit 14 is preset. Thereafter, the RAyt control circuit 14 supplies the count output of the address counter 14m to the address input terminal of the RAM 3.
The data at address <0> of M3, that is, the pitch code <S1> shown in FIG. When the pitch code <S1> is input, it is determined that the same pitch code <S1> is a pitch code, the same pitch code <S1> is output from the data output terminal DOI, and at the same time the signal NT ( 111 pulse signal) 0 This signal N
When T is supplied to the melody pitch register 17, the pitch code <S1> is loaded to the melody pitch register 17. Further, the signal NT is input to an OR gate 44 that ORs the signal NT, the signal CH, the signal PIC, and the signal IQ.As a result, a pulse signal of h% 1 N is output from the output terminal of the OR gate 44, and this pulse signal is supplied to the other input terminal of AND gate 37. In this case, since the po1'' signal is supplied to one input terminal of the AND gate 37, the same Hals signal of 1 is output from the output terminal of the AND gate 37.
This pulse signal is supplied to one input terminal of OR gate 45. As a result, a pulse signal of dl" is outputted from the OR gate 45 as a signal NEXT which means reading the next address of the RAM 30. [W control circuit 14]
When this signal NEXT is supplied, address counter 1
Increment 4m. Jin's result RAM3 <1>
The data at the address, that is, the chord code (S1) is read out and supplied from the RAM 3 to the data discriminating and distributing circuit 16. The data discrimination distribution circuit 16
) is determined to be a chord chord, and the same chord chord (S1
) is output from the data output terminal DO2, and at the same time the signal 0H is output.
(1 Hals signal) is output. When this signal CH is supplied to the load terminal LD of the chord register 23, the chord code (S1) is loaded into the chord register 23. The signal CH is also input to the OR gate 44. Therefore, in this case as well, the signal N'EXT is outputted by the same operation as described above. When supplied with this signal NEXT, the RAyt control circuit 14 increments the address counter 14m. As a result, the data record at address <2> of the RAM 3, that is, the note length code <NAE>, is read out and supplied from the RAM 3 to the data discriminating and distributing circuit 16. The data discrimination distribution circuit 16 determines that this note length code <S1> is a note length code, outputs the same note length code <S1> from the data output terminal Don, and simultaneously outputs the signal LN (the Hals signal of 1). ) is output. When this signal LN is supplied to the load terminal W of the note length register 28, the note length register 28 is loaded with the note length code <S1>. Therefore, this signal LN is not input to the OR gate 44. Therefore, in this case, signal NEXT is not generated. In other words, pitch code <φ1>, chord code (su1), and note length code <su1> are generated from addresses <0> to <2> of RAM3! Next, each of these chords is read out and the pitch is high! 17, chord register 23, note length register 28Kl [The next loading operation is performed instantly. Therefore, in this case, the musical tone signal formed by the female tone forming circuit 19 based on the pitch code <su1>K, and the accompaniment tone forming circuit 24 forming the musical tone signal based on the output of the automatic pattern signal generating circuit 26 and the chord code (all l) and the rhythm sound source circuit 27 generates an accompaniment sound signal based on the automatic pattern signal generation circuit 26.
The rhythm sound signals generated based on the outputs of are started to be mixed and emitted from the speaker 22 at substantially the same time. Further, in this case, in the key press display device 18, the lamp 12 of the key corresponding to the pitch code <su1> starts to light up. On the other hand, when the start/stop switch 6 is pressed and running, a pulse signal j8 of 1 is output from the AND gate 41.
TRT is supplied to one input terminal of the four OR gates. The output of this OR gate) 47 is supplied to the reset input terminal RK of the note length counter 30.
0 is cleared to zero at the time the pulse signal No. 8TRT is output, and counting of the tempo clock T-CLK is started from this time. The number of stitches output from the note length counter 30 (the count value of the tempo clock T-CLK) is then used as the note length code <su1> stored in the note length register 28KIe.
〉 value, that is, the note length code〈su1〉K
The time corresponding to the note length (however, the tempo clock T-CLK
When the unit time is 9), the comparison output terminal C of the comparison circuit 29 outputs the signal E Q ('I'l1). Since this signal IQ is supplied to the other input terminal of the OR gate 47, the note length counter 30 is cleared again at this time, and the same signal EQ is supplied to the OR gate 44, so that the OR gate 45 generates the signal Nff1XT. As a result, the address counter 14m is incremented,
The data at address <3> of the RAM 3, that is, the pitch code <su2>, is read out and supplied to the data discrimination distribution circuit 16. The data discrimination distribution circuit 16 reads this pitch code <su2>.
> is output from the data output terminal DOI, and at the same time the signal NT
Output. As a result, the pitch code <su2> is loaded into the melody pitch register 17. Since the good signal NT is supplied to the OR gate 44, the signal NEXT is generated again. As a result, the address counter 14m is incremented again, and the data at address <4> in the RAM 3, which is the code length code <2>, is read out. The data discrimination distribution circuit 16 outputs this note length code <S2> from the data output terminal Dog, and outputs the signals I and N.
The note length code <S2> is loaded into the note length register 28. The above-mentioned reading of the pitch code <Su2> from RAM3 and loading to the melody pitch register 17 and reading of the note length code <Su2> from RAM3 and loading to the note length register 28 are instantaneous. When the time corresponding to the note length code <1> has elapsed, the output of the speaker 22 changes to the pitch code <2>.
), and an accompaniment tone signal formed based on the output of the automatic pattern signal generation circuit 26 and the chord chord (S1). In this case, the lamp 12 of the key corresponding to the pitch code <S1> goes out, and the lamp 12 of the key corresponding to the pitch code <◆2> starts lighting up. Thereafter, data from address <6> of RAM 3 is read out by the same operation, and based on the read nine data (pitch code, chord code, note length code) K, musical tone signal, accompaniment tone signal, rhythm tone signal is generated, and the lamps 12, 12, . mark<
When Pl> is read out, the data discrimination and distribution circuit 16 discriminates that it is the same phrase end mark <Pt>t' and outputs the signal PH.0 However, in this case, the data discrimination and distribution circuit 16 The same phrase end mark <Pt> is not output from any of the data output terminals Dot, D02, and DO3. The signal PE is an OR gate 44
Since the signal NBX is input from the OR gate 45,
T4 is generated, the address counter 14m is incremented, and the data at address <1> of the RAM 3 is immediately read out. That is, in the normal playback mode, when a phrase end mark is read from RAM3, the phrase end mark is not used, and the data at the next address (data of the next phrase) is immediately read out. , the signal PE output from the data discrimination distribution circuit 16 is supplied to the siW control circuit 48;
In this normal reproduction mode, the 'BAt control circuit 48
doesn't work. Next, when a finish mark indicating the end of the music data is read out from the RAM 3, the data discriminating and distributing circuit 16 discriminates this finish mark and outputs a signal FNt--.This signal FN is used as a trigger 7. This resultant signal pL
If there is no "Ayfo" signal, this normal playback mode will be terminated. Note that this normal playback mode can also be ended by pressing the start/stop switch 6 again. When is pressed again, the trigger input terminal TK'l' signal is supplied to the trigger flip-flop 310, and the trigger flip-flop 31 is inverted to the reset state at the rising edge of the I signal. 0” signal 0 In this way, in the prison normal playback mode, the start/
When the stop switch 6 is pressed once, the music data in the RAM 3 is sequentially read out and the music is played and a key press instruction is given.
Also, when the reading of all song data is completed, the song starts playing.
The key press instruction ends automatically. Next, the case of (B) repeat playback mode will be explained. In the case of this (Bl repeat playback mode), the operator (practitioner) first specifies the desired phrases in the order of performance of each desired phrase using the phrase number. The circuit operation when the 7th phrase and the 3rd phrase are
An explanation will be given using an example in which the phrases are played in order and this performance is repeated. (B) To briefly explain each component that operates in the 9-beat playback mode, the RA' control circuit 48
is a rounding circuit for controlling the write operation and read operation of the RAM 80, and has an address counter 48m for specifying the address of the RAM 8. The key data phrase number conversion circuit 49 is a circuit that converts the key code KC supplied from the keyboard circuit 20 into a corresponding phrase number. , when the seventh white key 10 from the leftmost key is pressed, "1" is output, when the second white key 10 is pressed, "2" is output, and then the third, y
"3", "4" for the white key 10 of the th...
. . . are output respectively. Now, before specifying the phrase number, the operator first closes the repeat switch 5. When the repeat switch 5 is closed, the signal REPEAT changes to the t1'' signal, and at the same time the differentiating circuit 50 The pulse signal ΔREPEAT is outputted. The signal REPEAT is supplied to the enable input terminal EK of the gate circuit 35, so that the gate circuit 35 outputs the data output terminal Do of the RAM 4 and the R/%V control circuit 14. Data input terminal D
Connect with I. This signal REPEAT is also supplied to one input terminal of each of the AND gates 46, 51, and 52, and is also supplied to the first input terminal of the AND gate 53. Further, this signal REPEAT is supplied to one terminal of each AND gate 37.3g via the inverter 36.
As a result, these two games (37, 38) become closed. On the other hand, the pulse signal ΔREPEAT is supplied to the W control circuit 48.
o R,,% control circuit 48, when supplied with this pulse signal ΔREPEAT, presets the address counter 48m to "0";
A count output of 8m is output to the address input terminal A of the RAM 8, and a write command is issued to the RAM 8. In this case, since "0" is supplied to the data input terminal DIK of RAM8 (because no key operation has been performed yet), RAM8's <0> number, ground K "0" is supplied.
" is written. Immediately after the write operation is completed, the RA control circuit 48 increments the address counter 48 &, and then issues a write command to the RAM 8. As a result, the frame control circuit 48 writes all the addresses K "0" of the RAM 8 from the <2> address onwards in the same way as 0 where the <1> address K "0" of the RAM 8 is written. Then, the R,+ control circuit 48 stops the write operation when all addresses K "0" of the RAM 8 are written. In addition, the address counter 48 is J.
Since it has only the number of bits necessary to indicate all addresses in tAM8, the count output returns to "0" when all addresses in RAM8 are cleared to zero. In this way, when the repeat switch 5 is closed, the RA
All addresses of M8 are cleared to zero. Note that this zero clearing is instantaneously performed.Next, the operator presses the set switch 7 while pressing the leftmost white key 10 on the keyboard 9. When the leftmost white key 10 is pressed, the key code KC corresponding to the white key 10 is output from the keyboard circuit 20 and supplied to the key data phrase number conversion circuit 49. As a result, the value rlJ is output from the key data phrase number conversion circuit 49, and
8 data input terminal DI. On the other hand, when the front set switch 7 is pressed momentarily, a signal S indicating the setting of the phrase number is sent from the output terminal of the AND gate 52.
E T (pulse signal of '1') is output and supplied to the piece control circuit 48. When this signal SET is supplied, the RAr control circuit 48 supplies the count output of the address counter 48m (in this case, "0") to the address input terminal 1000 of the RAM 8, and also issues a write instruction to the RAM 8. Give off a sip. In this case, since the value "1" is supplied to the data input terminal DI of RAM8 as described above, the RAM
8 <0> address K "1" is written (see Figure y, e9). The RAr control circuit 48 increments the address counter 48& upon completion of this write operation. Next, the operator presses the set switch 7 again while holding down the leftmost white key 10. When the set switch 7 is pressed, a signal SET is output from the AND gate 52 and supplied to the piece control circuit 48. When the control circuit 48 is supplied with this signal SET, it supplies the count output of the address counter 4810 (in this case "1") to the address input terminal A of the RAM 8 and issues a write command to the RAM 8. In this case, R
Since the data input terminal DI of AM8 is supplied with the value "1" from the key data phrase number conversion circuit 49 corresponding to the leftmost white key 10, the value "1" is input to address <1> of the RAM8. is written. When this write operation is completed, the control circuit 48 increments the address counter 48a. Thereafter, in the same way, the operator presses the third white key 10 from the left on the keyboard 9 and presses the set switch 7 to 3.
When the button is pressed twice, the value "3" is sequentially written into addresses <2> to <4> of the RAM 8 (see Fig. 3(c)). In this case,
Addresses from address <5> onwards in RAM8 remain cleared. In this way, one operator can use the white keys 10.10. . . . and set switch 7 to select each desired phrase.
If you specify the order of performance of each of these desired phrases, the RA
The phrase numbers of these desired phrases are stored in the M8 in the desired performance order. Next, the case where music is played in the (Bl repeat playback mode) will be described using the data stored in the RAM 8. In this case, the operator momentarily presses the start/stop switch 6 while keeping the repeat switch 5 in the closed state.When the start/stop switch 6 is pressed, the trigger flip 70 is activated as described in the normal playback mode. Signal pLAy# output from set output terminal Q of knob 31
1' signal, and one pulse (
14Δ8TRT is output. 1 signal and Natsuyoshi signal PL
AY is melody pitch register 17, chord register 23
are released from the reset state to the operable state 111, and the automatic pattern signal generation circuit 26 is started to operate. On the other hand, the 11N pulse signal Δ5TRT output from the AND gate 41 is supplied to one input terminal of the OR gate 54. In this case, since the Ho" signal is supplied to the other input terminal of the OR gate 54, a Hals signal of 1 is output from the OR gate 54 and supplied to the third input terminal of the AND gate 53. The first and third input terminals of this AND gate 53 receive signals REPEAT,
Since the signal PLAY is supplied to each of them, and both of these signals are now the P1" signal, the AND gate 53 is
11" signal l5ET (initial set signal) is output. When this signal l8ET is supplied, the piece control circuit 48 presets the address counter 48KrOJt-,
The count output is supplied to address input terminal A of RAM8. As a result, the data at address <0> of RAM8 is 7.
The reset number "1" is read out and output from the data output terminal DO of the RAM 8 (see FIG. 9(c)). The phrase number "1" output from the data output terminal Do of this RAM8 is supplied to the RAr control circuit 151C, and
Address counter 15a provided in Aw control circuit 15
is preset to . Next, the LeW control circuit 15 decrements the address counter 15m, and then outputs the counting output of the address counter 15a (in this case, 10'') to RA.
It is supplied to the address input terminal -j-A of M4. This result R
The data at address <0> of AM4, that is, the start address (
Pt> (value “0” in this case) is read out (see Figure 7 (
(See b)). The value “0” read from this RAM4 is
The signal is output from the data output terminal DO of the RAM 4 and supplied to the data input terminal DI of the W control circuit 14 via the gate circuit 35. On the other hand, the signal l output from the AND gate 53
5ET (pulse signal of '1') is 0 which is supplied to one input terminal of the OR gate 55.
A pulse signal of 5 or i, '1'' is output, and this pulse signal is supplied to the other input terminal of the AND gate 51.0 The signal REPEAT supplied to one input terminal of the AND gate 51 is In this case, since the signal is 1, the AND gate 51 outputs a pulse signal of 'II, and supplies the 2'1 signal to the preset input terminal PS of the 'k' control circuit 14 via the OR gate 43. Piece control circuit 14 When the preset input terminal PS pin 1' signal is supplied, it presets the value rOJ supplied to the data input terminal DIK mentioned above in the address counter 14a, and sends the count output of the address counter 14a to the address input terminal A of the RAM3. As a result, the data at address <0> of RAM 3, that is, the pitch code <sl> which is the first pitch code of the first phrase . Reference) 0
When this pitch code <S1> is supplied, the data publication sorting circuit 16 outputs the same pitch code <S1> to the data output terminal D.
This signal NT outputs from the OI and simultaneously outputs the signal NT ('I'' pulse signal).
> is loaded into the melody pitch register 17. Further, this signal NT is input to an OR gate 56 that ORs the signal NT, the signal CH, and the signal IQ. As a result, a nor pulse signal of 1 is output from the OR gate 56, and this pulse signal is supplied to the other input terminal of the OR gate 45 via the AND gate 46, and as a result, a signal NEXT is generated. Therefore, the address counter 14a
is incremented. Hereinafter, (5) data from addresses <1> onward in the RAM 3 are sequentially read out according to the same circuit operation as in the normal playback mode, pitch data is sent to the melody pitch register 17, chord codes are sent to the chord register 23, -The note length codes are each loaded into the note length register 28, and the music of the first phrase is played back. Then, when the music reproduction of the first phrase is finished and the phrase end mark <Pl> indicating the end of the first phrase is read from the address <1-1> of the RAM 3, the data discrimination distribution circuit 16 receives the signal Outputs PE (1 pulse signal). This signal PK is supplied to the R,+ control circuit 48. R.A.
When the control circuit 48 is supplied with the signal PK, it increments the address counter 48m. As a result, the data at address <1> of RAM8, that is, the first phrase number "
1" is read out (see FIG. 7 (c)) 0 This RAM8
The phrase number "1" read from the RAr control circuit 15 is preset in the address counter 15a of the RAr control circuit 15. R
, 4 control circuit 15 decrements the address counter 15m and supplies the count output of the address counter 15m (value "0" in this case) to the address input terminal A of the RAM 4. As a result, the data at address <0> of RAM4, that is, the start address <Pt> (value "0" in this case) is read out again (see Figure 7 (b)) 0 Read from address <0> of RAM4 The value “0” is the gate circuit 35
The signal is supplied to the data input terminal DI of the RAr control circuit 14 via the RAr control circuit 14. On the other hand, the signal PK output from the data discrimination distribution circuit 16 is supplied to the other input terminal of the OR gate 55. As a result, a pulse signal of HI1'' is output from the OR gate 55, and a pulse signal of dIN is output from the AND gate 51.
0 is supplied to the preset input terminal PS of the W control circuit 14 via the OR gate 43 in sequence! 4 circuits 14.
When the d-bit pulse signal is supplied to the preset input terminal P8, the address counter 141 is preset with the value rOJ supplied to the data input terminal -FDI mentioned above, and the counting output of the address counter 14P is stored in the RAM 3. is supplied to address input terminal A of. As a result, RAM3
The data at address 0, that is, the pitch code <su1> is read out (see timfO).0 This pitch code <su1> is read out.
The operation after > is read out is exactly the same as the operation when playing the music of the first phrase described above. In this way, the Qinji data of the first phrase is read out from RAM3 again, the pitch data is sent to the medi pitch register 17, the chord code is sent to the chord register 23, and the i9 note length code is sent to the note length register 17. are respectively loaded into the register 28 and #I/
The second song playback of 7 Rays is performed. Then, this second playback of the 17th race song ends, and the phrase end mark <P! > is read out, the data control circuit 48 increments the address counter 481 when this signal PE is supplied. As a result, the data at address <2> of the RAM 8, that is, the phrase number "3" is read out (see FIG. 9 (c)).
It is preset to the address counter 15& of the output control circuit 15. Next, the RAr control circuit 15 decrements the address counter 15a. This shadow is M4's <
2> Address data, that is, the start address <Pg>
(In this case, the value "j") is read out, and this value "j" is supplied to the data input terminal DI of the W control circuit 14 via the gate circuit 35 (see Fig. 9 ←)) On the other hand , the signal PK is sent to the RAr control circuit 14 via the OR gate 55, the AND gate 51, and the OR gate 43 in sequence.
is supplied to the preset input terminal PS of. As a result, 7
The value "j" is preset in the dress counter 141. As a result, the pitch code <su I
'> (that is, the first pitch code of the third phrase) is read out (see Figure 7, 0)) Below 0, the music of the 17th phrase is read out. The stored music data of the 37th phrase is sequentially read out, and the music of the 37th phrase is played. Then, the music playback of this third phrase is completed and the music data of the 37th phrase is read out.
Phrase end indicating the end of the third phrase! −ri＜
When Ps > is read out, the data discrimination distribution circuit 16 generates a signal P'E.0 When this signal PE is generated,
Address counter 48m is incremented and RAM
The data at address <3> of No. 8, that is, the second phrase number "3" is read out. However, below is the 3rd part of the 7th
Exactly the same as when playing a phrase song: Follow the O movement, -
The music of the third phrase of "mill" is being played. Then, when the music reproduction of the third phrase is completed and the phrase end mark <Ps> is read out from the RAM 3, the data discriminating and distributing circuit 16 outputs the signal PE again.
0 When this signal PE is output, the address counter 48m is incremented, and <4
〉Address data, that is, the third phrase number “3”
is read out. However, from now on, follow exactly the same operation as when playing the music of the 3rd phrase for the 7th and 2nd time,
The music of the third phrase is played for the third time. When the music of the third phrase is played for the third time and the phrase end mark <Ps> is read out from the RAM 3, the data is distinguished and distributed. Signal PK again from circuit 16
0 When this signal PE is output, the address counter 48m is incremented and the <5
>The data at the address, ie, the value rOJ, is read out. Here, all bits of data output from the data output terminal Do of the RAM 8 are negated by the NOR gate 57. Therefore, in the case of HI, a HI1' signal is output from the NOR gate 57. noah gate 57
The l signal outputted by the AND gate 530 is supplied to the first input terminal of the AND gate 530 via the OR gate 54. This resultant signal l
8ET is output. ibb is the signal that is also generated when it is pressed, and this signal l5
When ET is generated, the address counter 4
8aKrOJ is preset, and the music reproduction in this (B) repeat reproduction mode is repeated from the beginning. In other words, in this case, the songs of the first phrase and the third phrase are again the first phrase, the first phrase, the third phrase,
The third phrase and the 37th race are played in this order. In this case as well, when the music reproduction of the third phrase is completed for the third time, 1 signal is output from the Noah gate 57, and the resultant signal 18KT is output again. In this (B) repeat playback mode, the total number of 117 races to be reproduced is determined by the 7th race honor number sequentially read from address <0> of RAM8.
When the reproduction of the phrases corresponding to all the phrase numbers stored in the RAM 8 is completed, the reproduction of each of these seven races starts again from the beginning, and this repetition ends when the start/stop switch 6 is pressed again. That is, when the start/stop switch 6 is pressed, the trigger clip flop 31 is not reset, resulting in the signal pLAyi10'. Signal PLAY power? 0" signal, the melody pitch register 17, chord register 23, and automatic pattern signal generation circuit 26 are all reset, and the music playback is stopped. In this (Bl repeat playback mode), the RAM
If phrase numbers are written in all addresses of RAM 8, the Noah Gate 57 pin 1" signal will not be output, but the phrase songs corresponding to all the phrase numbers stored in RAM 8 will be output. The signal 15ET is not generated even when the reproduction is finished, but in this case, the address counter 48a overflows and the R
The <0> address of AM8 is designated, so that the reproduction of each of these phrases is repeated from the beginning. In addition, in this embodiment, music data etc. are transferred to the RA via the magnetic tape 2 or reading device 13.
I tried to store it in M3-, but this is stored in keyboard 9 and
In this embodiment, it is of course possible to store each key on the keyboard 9 in the RAM 3 using control switches used to specify note lengths, rests, phrases, etc., and other program switches. Although the song can be played in phrase units, it is of course possible to play the song in bar units as well.
In the above embodiment, the music is played repeatedly in the (B) repeat playback mode until the start/stop switch 6 is pressed again. The music playback may be configured to be automatically stopped when the playback of the phrases corresponding to all the phrase numbers in the list has been completed. In addition, in the above embodiment, an example was given in which the music is played in the order of 1st phrase, 7th phrase, 3rd phrase, 3rd phrase, and 3rd phrase in the 81 repeat playback mode. (In the Bl repeat playback mode, any phrase can be specified as any phrase number 11. For example, in this case, each desired phrase can be specified as 1st phrase, 1st phrase, 1st phrase, 27° raise,
It may be specified randomly, such as the first phrase and the second phrase. As is clear from the above description, the electronic musical instrument according to the present invention includes a data storage section, a writing means for writing data related to the performance of a musical piece into the data storage section, and a section specifying means for specifying a section to be played. a section information storage section that stores information corresponding to the section specified by the section specifying means; and a section information storage section that stores information corresponding to the section specified by the section specifying means; A reading means for reading out data from the data storage section and a reproducing means for reproducing the data successively read out by the reading means are provided, and information (section information; for example, 7-ray number) corresponding to each desired section in the song is provided. ), the desired section is played back (i.e., musical tone generation or key press instruction) according to the stored section information, so the practitioner can, for example, repeatedly play only the desired phrase. Because you can do this, you can practice extremely effectively, and you can play music by arbitrarily combining multiple phrases on a phrase-by-phrase basis. You can enjoy the feeling. Further, according to the present invention, the writing means is a musical score in which phrase numbers are written in advance, and data regarding the performance of the Hata expressed on the musical score and data regarding the phrase number of each phrase of the music are stored respectively. If the device comprises a musical score and a data input means for reading the data stored in the musical score and writing the read data into the data storage section, it is possible to specify a desired phrase very easily while viewing the musical score. It will also be possible to do so.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing the configuration of an embodiment in which the present invention is applied to an electronic organ, Fig. 1 is a diagram showing musical scores used in the embodiment, and Fig. 3 is music data in the embodiment. , a diagram showing the arrangement format of the head address data, and FIG.
FIG. 5 is a diagram showing the keyboard section in the same embodiment. 1...Sheet music, 2...Magnetic tape, 3.
4.8...RAM, 9...Keyboard, 10
．． 11・Old・・Key (key), 12−・・・57p, 1
4.15.48 ...--RAN! 6 control circuits, 16
......Data discrimination distribution circuit, 17...Melody pitch register, 18...Key press display device,
19... Melody sound forming circuit, 20...
・Keyboard circuit, 23...Chord register, 28・Old note length register, 29...Comparison circuit, 30・
...Note length counter, 49...Key data phrase number conversion circuit.

Claims (1)

[Scope of Claims] (1) a data storage unit, a writing means for writing data to the data storage unit for the performance of the music, and an interval for specifying the interval in which the music should be played. a section information storage unit storing information corresponding to the section specified by the section specification means; and a section information storage unit storing information corresponding to the section specified by the section specification means; [Characteristics] The present invention is characterized by comprising means for successively reproducing data related to performances of n sections from the data storage section, and reproducing means for reproducing the data successively retrieved by the successive reproducing means.[Characteristics] (2) The writing means is a musical instrument in which a phrase number is written in advance, and the writing means writes data related to the performance of the musical piece displayed on the musical instrument and each of the seven levels of the musical piece. sheet music and
This patent claim consists of human-powered means for reading data that has been recorded with ease and storing the read data in separate data IIc.
Kanji ware described in Section 1. (311tD era data storage is Issouki song Q) The first storage part in which data related to performance is stored, and the phrase number &:@T data are stored in this 11th/) era song Q. A special ffM-required range @ λ section is characterized in that it consists of a data U that is open for the performance of a musical piece, and a 10' storage section in which the storage area for each phrase is recorded as T1 information. electronic musical instrument. (4) The area specifying means is a key switch housed in each keyboard key.
The electronic musical instrument according to items I to 3. (51) The reproduction means automatically generates a musical tone or displays a pressed key or generates a musical tone and displays a pressed #! based on the data successively read out by the reading means.
1! Special #F harmony range 1st X1i characterized by being @! Electronic musical instruments.