JPS5797148A - Branch control system of microprogram - Google Patents
Branch control system of microprogramInfo
- Publication number
- JPS5797148A JPS5797148A JP17346180A JP17346180A JPS5797148A JP S5797148 A JPS5797148 A JP S5797148A JP 17346180 A JP17346180 A JP 17346180A JP 17346180 A JP17346180 A JP 17346180A JP S5797148 A JPS5797148 A JP S5797148A
- Authority
- JP
- Japan
- Prior art keywords
- code
- address
- branch
- control
- control memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
- G06F9/262—Arrangements for next microinstruction selection
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
Abstract
PURPOSE:To execute a branch control without making a control memory larger than required, by operating a desired address by use of a next address code provided in a micro-instruction, and a selected branch index code. CONSTITUTION:In an area of a block ''0'' of a control memory 2, an index field SI for generating an address of a branch destination is provided. When an address controlling circuit 4 discriminates a branch instruction, one of said branch index codes SI0-SI3 is selected by a next address code NA in the micro- instruction which has been read out from the control memory 2, and an address control code AC, said code NA and the selected branch index code SI are operated by an operating means 9, new address information is generated, and the control memory 2 is accessed. In this way, the instruction function is expanded without making the control memory 2 larger than required, and complicated control is executed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17346180A JPS5797148A (en) | 1980-12-09 | 1980-12-09 | Branch control system of microprogram |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17346180A JPS5797148A (en) | 1980-12-09 | 1980-12-09 | Branch control system of microprogram |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5797148A true JPS5797148A (en) | 1982-06-16 |
JPS6130295B2 JPS6130295B2 (en) | 1986-07-12 |
Family
ID=15960897
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17346180A Granted JPS5797148A (en) | 1980-12-09 | 1980-12-09 | Branch control system of microprogram |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5797148A (en) |
-
1980
- 1980-12-09 JP JP17346180A patent/JPS5797148A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6130295B2 (en) | 1986-07-12 |
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