JPS5719844A - Information processing equipment - Google Patents

Information processing equipment

Info

Publication number
JPS5719844A
JPS5719844A JP9254280A JP9254280A JPS5719844A JP S5719844 A JPS5719844 A JP S5719844A JP 9254280 A JP9254280 A JP 9254280A JP 9254280 A JP9254280 A JP 9254280A JP S5719844 A JPS5719844 A JP S5719844A
Authority
JP
Japan
Prior art keywords
machine cycle
processing
instruction
signal
executed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9254280A
Other languages
Japanese (ja)
Other versions
JPS63823B2 (en
Inventor
Yukihiro Nishiguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP9254280A priority Critical patent/JPS5719844A/en
Publication of JPS5719844A publication Critical patent/JPS5719844A/en
Publication of JPS63823B2 publication Critical patent/JPS63823B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution

Abstract

PURPOSE:To execute a processing at a high speed, and to simplify a circuit design and wiring, by decoding an instruction to be executed, and selecting a necessary machine cycle in order, in an information processing equipment having a machine cycle generating circuit. CONSTITUTION:A generation request signal of a machine cycle required for executing each instruction is inputted to a timing controlling circuit 6, a data processing function which is controlled by a machine cycle signal is set in advance, and when executing the instruction, an instruction code which has been read out from a read- only memory 1 is decoded, each machine cycle signal and a control signal are outputted, and a necessary machine cycle is selected so that it is generated in order. According to this constitution, an unnecessary machine cycle is skipped and only a machine cycle signal required for processing is outputted. Accordingly, the processing is executed at a high speed and also to each machine cycle is assigned in advance a processing circuit by which the processing is executed in its period, therefore, a circuit design and wiring become very simple.
JP9254280A 1980-07-07 1980-07-07 Information processing equipment Granted JPS5719844A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9254280A JPS5719844A (en) 1980-07-07 1980-07-07 Information processing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9254280A JPS5719844A (en) 1980-07-07 1980-07-07 Information processing equipment

Publications (2)

Publication Number Publication Date
JPS5719844A true JPS5719844A (en) 1982-02-02
JPS63823B2 JPS63823B2 (en) 1988-01-08

Family

ID=14057260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9254280A Granted JPS5719844A (en) 1980-07-07 1980-07-07 Information processing equipment

Country Status (1)

Country Link
JP (1) JPS5719844A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04107735A (en) * 1990-08-29 1992-04-09 Nec Ic Microcomput Syst Ltd Semiconductor integrated circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5412655A (en) * 1977-06-30 1979-01-30 Toshiba Corp Microprogram controller

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5412655A (en) * 1977-06-30 1979-01-30 Toshiba Corp Microprogram controller

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04107735A (en) * 1990-08-29 1992-04-09 Nec Ic Microcomput Syst Ltd Semiconductor integrated circuit

Also Published As

Publication number Publication date
JPS63823B2 (en) 1988-01-08

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