JPS5778164A - Diffused resistor for semiconductor integrated circuit - Google Patents

Diffused resistor for semiconductor integrated circuit

Info

Publication number
JPS5778164A
JPS5778164A JP15353080A JP15353080A JPS5778164A JP S5778164 A JPS5778164 A JP S5778164A JP 15353080 A JP15353080 A JP 15353080A JP 15353080 A JP15353080 A JP 15353080A JP S5778164 A JPS5778164 A JP S5778164A
Authority
JP
Japan
Prior art keywords
layer
variation
type diffused
type
diffused resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15353080A
Other languages
Japanese (ja)
Inventor
Akio Tokuge
Yoshihiko Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Corp
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Corp, Pioneer Electronic Corp filed Critical Pioneer Corp
Priority to JP15353080A priority Critical patent/JPS5778164A/en
Publication of JPS5778164A publication Critical patent/JPS5778164A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/0802—Resistors only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To maintain the resistance value of a semiconductor integrated circuit by isolating a p type diffused resistor and a p type diffused layer on an n type epitaxial layer, forming an n type diffused resistor in a p type diffused layer, and connecting p type diffused resistor in parallel, thereby cancelling the variation in the resistance value due to the variation in the current. CONSTITUTION:p type diffused regions 2, 3 are isolated on an n type epitaxial layer 1 on a p type substrate, and an n type diffused layer 4 is formed in the region 3. Two terminals are provided at the lyers 2, 4 as resistors formed so that the resistance values become equal and connected in parallel. The maximum potential +Vcc of the circuit is applied to the layer 1 for biasing, the layer 3 is set to 0 volt equal to the substrate to insulate the layers 2, 4. In this manner, the variation in the resistance (variation in the depletion layer width due to the variation in the junction voltage) at the time of energizing the layers 2, 4 can be cancelled, thereby maintaining the resistance values connected in parallel constantly.
JP15353080A 1980-10-31 1980-10-31 Diffused resistor for semiconductor integrated circuit Pending JPS5778164A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15353080A JPS5778164A (en) 1980-10-31 1980-10-31 Diffused resistor for semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15353080A JPS5778164A (en) 1980-10-31 1980-10-31 Diffused resistor for semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS5778164A true JPS5778164A (en) 1982-05-15

Family

ID=15564532

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15353080A Pending JPS5778164A (en) 1980-10-31 1980-10-31 Diffused resistor for semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS5778164A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2598852A1 (en) * 1986-05-16 1987-11-20 Eurotechnique Sa INPUT PROTECTION DEVICE FOR CIRCUITS INTEGRATED IN CMOS TECHNOLOGY.

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2598852A1 (en) * 1986-05-16 1987-11-20 Eurotechnique Sa INPUT PROTECTION DEVICE FOR CIRCUITS INTEGRATED IN CMOS TECHNOLOGY.

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