JPS5776639A - Microcomputer emulator - Google Patents

Microcomputer emulator

Info

Publication number
JPS5776639A
JPS5776639A JP55153243A JP15324380A JPS5776639A JP S5776639 A JPS5776639 A JP S5776639A JP 55153243 A JP55153243 A JP 55153243A JP 15324380 A JP15324380 A JP 15324380A JP S5776639 A JPS5776639 A JP S5776639A
Authority
JP
Japan
Prior art keywords
operation instruction
storage device
interruption
instruction
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55153243A
Other languages
Japanese (ja)
Other versions
JPS629940B2 (en
Inventor
Toshio Yanagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55153243A priority Critical patent/JPS5776639A/en
Publication of JPS5776639A publication Critical patent/JPS5776639A/en
Publication of JPS629940B2 publication Critical patent/JPS629940B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017—Runtime instruction translation, e.g. macros

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To perform emulation by complete single-step operation by inserting a no-operation instruction forcibly every time a target instruction is executed, and by generating an interruption which can not be inhibited during the instruction execution. CONSTITUTION:Every time a microprocessor 1 executes one of program instructions stored in a storage device 3, it reads a no-operation instruction out of a no- operation instruction storage device 15 to a data bus 4, thereby executing this no- operation instruction. Then, a request for an interruption which can not be inhibited is sent, in response to a signal from a status detecting circuit 10, to a microprocessor 1 through an interruption signal selection circuit 12 at a point in time a little bit behind the execution start of the no-operation instruction. This request for the interruption returns the control from the execution of the instructions stored in the storage device 3 to a control program in a storage device 2.
JP55153243A 1980-10-31 1980-10-31 Microcomputer emulator Granted JPS5776639A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55153243A JPS5776639A (en) 1980-10-31 1980-10-31 Microcomputer emulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55153243A JPS5776639A (en) 1980-10-31 1980-10-31 Microcomputer emulator

Publications (2)

Publication Number Publication Date
JPS5776639A true JPS5776639A (en) 1982-05-13
JPS629940B2 JPS629940B2 (en) 1987-03-03

Family

ID=15558182

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55153243A Granted JPS5776639A (en) 1980-10-31 1980-10-31 Microcomputer emulator

Country Status (1)

Country Link
JP (1) JPS5776639A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62183253U (en) * 1986-05-12 1987-11-20

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62183253U (en) * 1986-05-12 1987-11-20

Also Published As

Publication number Publication date
JPS629940B2 (en) 1987-03-03

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