JPS5773436A - Bus selecting device - Google Patents
Bus selecting deviceInfo
- Publication number
- JPS5773436A JPS5773436A JP14877280A JP14877280A JPS5773436A JP S5773436 A JPS5773436 A JP S5773436A JP 14877280 A JP14877280 A JP 14877280A JP 14877280 A JP14877280 A JP 14877280A JP S5773436 A JPS5773436 A JP S5773436A
- Authority
- JP
- Japan
- Prior art keywords
- line
- device number
- signal
- bus
- controller
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
- G06F13/366—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using a centralised polling arbiter
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Bus Control (AREA)
- Small-Scale Networks (AREA)
Abstract
PURPOSE:To reduce the delay of transmission for a processor having a low level in priority and to enhance the using of the system bus by designating the device number intrinsic to each processor communication channel when the selection of bus is carried out. CONSTITUTION:When a bus master controller 4 detects that no busy signal BSY is supplied to a busy line 7, the polling signal PS is transmitted to polling signal line 6 from the controller 4. At the same time, the device number is transmitted to a data line 8. The signal PS is supplied to the line 6 for each of plural processor communication channels 3. Then the signal BSY is taransmitted to a busy signal line 7 from a channel 3 that detected a transmission request and when a coincidence is obtained between the device number DN' and the own device number DN. At the same time, the data is sent to the line 8. Thus the process is carried out in order that is designated by the controller 4.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14877280A JPS5773436A (en) | 1980-10-23 | 1980-10-23 | Bus selecting device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14877280A JPS5773436A (en) | 1980-10-23 | 1980-10-23 | Bus selecting device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5773436A true JPS5773436A (en) | 1982-05-08 |
Family
ID=15460311
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14877280A Pending JPS5773436A (en) | 1980-10-23 | 1980-10-23 | Bus selecting device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5773436A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01161942A (en) * | 1987-12-18 | 1989-06-26 | Hitachi Ltd | Data transmission equipment and its method |
-
1980
- 1980-10-23 JP JP14877280A patent/JPS5773436A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01161942A (en) * | 1987-12-18 | 1989-06-26 | Hitachi Ltd | Data transmission equipment and its method |
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