JPS5762457A - Vector arithmetic system - Google Patents

Vector arithmetic system

Info

Publication number
JPS5762457A
JPS5762457A JP13773280A JP13773280A JPS5762457A JP S5762457 A JPS5762457 A JP S5762457A JP 13773280 A JP13773280 A JP 13773280A JP 13773280 A JP13773280 A JP 13773280A JP S5762457 A JPS5762457 A JP S5762457A
Authority
JP
Japan
Prior art keywords
operand
input
operating device
control part
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13773280A
Other languages
Japanese (ja)
Inventor
Hideo Miyanaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP13773280A priority Critical patent/JPS5762457A/en
Publication of JPS5762457A publication Critical patent/JPS5762457A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Computational Mathematics (AREA)
  • Data Mining & Analysis (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)

Abstract

PURPOSE:To set up versatile arithmetic modes without placing a load on a control part by linking operating devices each having two input and output operands and by converting a flag, indicating a link mode, and a by-pass pointer each time an arithmetic step is advanced. CONSTITUTION:The 1st operand output of a front-stage operating device 11 is connected to the 1st operand input of a front-stage operating device 11 via a link bus 12 to link all operating devices, and the 2nd operand input of each operating device is received from a memory 15 through a control part 14 and an input bus 13. The 2nd operand output of each operating device is transmitted to the memory 15 through an output bus 16 and the control part 14. The control part 14 adds a flag, indicating line modes between respective operating devices, and a pointer, indicating the by-pass of an operating device which does not match with the arithmetic link mode, to each input operand date and each time an arithmetic step is advanced, they are converted automatically according to a predetermined conversion table.
JP13773280A 1980-10-03 1980-10-03 Vector arithmetic system Pending JPS5762457A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13773280A JPS5762457A (en) 1980-10-03 1980-10-03 Vector arithmetic system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13773280A JPS5762457A (en) 1980-10-03 1980-10-03 Vector arithmetic system

Publications (1)

Publication Number Publication Date
JPS5762457A true JPS5762457A (en) 1982-04-15

Family

ID=15205532

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13773280A Pending JPS5762457A (en) 1980-10-03 1980-10-03 Vector arithmetic system

Country Status (1)

Country Link
JP (1) JPS5762457A (en)

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