JPS5759252A - Operand control system of data flow computer - Google Patents

Operand control system of data flow computer

Info

Publication number
JPS5759252A
JPS5759252A JP13283780A JP13283780A JPS5759252A JP S5759252 A JPS5759252 A JP S5759252A JP 13283780 A JP13283780 A JP 13283780A JP 13283780 A JP13283780 A JP 13283780A JP S5759252 A JPS5759252 A JP S5759252A
Authority
JP
Japan
Prior art keywords
block
operand
memory
address
physical block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13283780A
Other languages
Japanese (ja)
Inventor
Shosuke Kuzumi
Noriyoshi Ito
Hiroshi Yasuhara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP13283780A priority Critical patent/JPS5759252A/en
Publication of JPS5759252A publication Critical patent/JPS5759252A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE:To speed an operand control within sufficient memory capacity by directly generating address wherein operands are stored by applying a hash function to a part of information from an arithmetic part, and by securing and releasing their areas dynamically. CONSTITUTION:Parts ACT# and CA of information contained in a token sent from an arithmetic part to an operand storage part 1 are used as a logical address, the low-order digit bits of which are assigned as an in-block address. The storage part 1 is provided with a block conversion part 4 which compresses and converts a logical block into a physical block by using a hash function, an operand memory 6 composed of a set of physical blocks each accessed on the basis of the in-block address, a physical block control part 5 which detects the in-use the state and use completion of each physical block in the memory 6, and a token-number control part 7. Further, chain structure is employed by the memory 6 to secure and release the physical block, and its in-use state is controlled by the control part 7.
JP13283780A 1980-09-26 1980-09-26 Operand control system of data flow computer Pending JPS5759252A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13283780A JPS5759252A (en) 1980-09-26 1980-09-26 Operand control system of data flow computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13283780A JPS5759252A (en) 1980-09-26 1980-09-26 Operand control system of data flow computer

Publications (1)

Publication Number Publication Date
JPS5759252A true JPS5759252A (en) 1982-04-09

Family

ID=15090674

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13283780A Pending JPS5759252A (en) 1980-09-26 1980-09-26 Operand control system of data flow computer

Country Status (1)

Country Link
JP (1) JPS5759252A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6032622A (en) * 1983-08-04 1985-02-19 Japan Styrene Paper Co Ltd Polypropylene type resin foamed body
JPS60146335A (en) * 1984-01-11 1985-08-02 Nippon Telegr & Teleph Corp <Ntt> Data flow computer
JPS60189539A (en) * 1984-03-09 1985-09-27 Nec Corp Queuing circuit
JPH05506875A (en) * 1990-03-14 1993-10-07 ザ・ジエイムズ・リバー・コーポレイシヨン polypropylene foam sheet
US5713001A (en) * 1992-08-07 1998-01-27 International Business Machines Corporation Circuit for converting address operands supplied by a program to hashed virtual address

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6032622A (en) * 1983-08-04 1985-02-19 Japan Styrene Paper Co Ltd Polypropylene type resin foamed body
JPS6367810B2 (en) * 1983-08-04 1988-12-27 Japan Styrene Paper Corp
JPS60146335A (en) * 1984-01-11 1985-08-02 Nippon Telegr & Teleph Corp <Ntt> Data flow computer
JPS60189539A (en) * 1984-03-09 1985-09-27 Nec Corp Queuing circuit
JPH0512735B2 (en) * 1984-03-09 1993-02-18 Nippon Electric Co
JPH05506875A (en) * 1990-03-14 1993-10-07 ザ・ジエイムズ・リバー・コーポレイシヨン polypropylene foam sheet
US5713001A (en) * 1992-08-07 1998-01-27 International Business Machines Corporation Circuit for converting address operands supplied by a program to hashed virtual address

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