JPS5758323A - Method for forming insulating film on compound semiconductor - Google Patents

Method for forming insulating film on compound semiconductor

Info

Publication number
JPS5758323A
JPS5758323A JP55132622A JP13262280A JPS5758323A JP S5758323 A JPS5758323 A JP S5758323A JP 55132622 A JP55132622 A JP 55132622A JP 13262280 A JP13262280 A JP 13262280A JP S5758323 A JPS5758323 A JP S5758323A
Authority
JP
Japan
Prior art keywords
compound semiconductor
nitride
oxide
insulating film
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55132622A
Other languages
Japanese (ja)
Inventor
Masashi Yamaguchi
Takashi Andou
Takao Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP55132622A priority Critical patent/JPS5758323A/en
Publication of JPS5758323A publication Critical patent/JPS5758323A/en
Pending legal-status Critical Current

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/24—Vacuum evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Mechanical Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To form a chemically stable insulating film having excellent insulating characteristics by a heat-treating III-V group compound semiconductor in a specified temperature range in an atmosphere of oxide comprising V group element or nitride. CONSTITUTION:At one end of the inside of a reacting tube 1, the III-V group compound semiconductor 3 such as InP is introduced. At the other end thereof, oxide 4 comprising V group element such as P2O5 or nitride 4 such as InN is introduced. Then the inside of said reacting tube 1 is evacuated and the reacting tube 1 is hermetically sealed. Then, said reacting tube is inserted into an electric furnace 2 comprising two different temperature regions. The oxide or nitride 4 is placed at the low temperature region and the semiconductor 3 is placed at the high temperature region, and the heat treatment is performed at 400-650 deg.C. As a result, an oxide film or nitride film 5 having a constituent element of the compound semiconductor is formed on the surface of the semiconductor 3. In this method, the insulating film whose insulating characteristics and thermal stability are excellent can be formed with a desired thickness and good reproducibility.
JP55132622A 1980-09-24 1980-09-24 Method for forming insulating film on compound semiconductor Pending JPS5758323A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55132622A JPS5758323A (en) 1980-09-24 1980-09-24 Method for forming insulating film on compound semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55132622A JPS5758323A (en) 1980-09-24 1980-09-24 Method for forming insulating film on compound semiconductor

Publications (1)

Publication Number Publication Date
JPS5758323A true JPS5758323A (en) 1982-04-08

Family

ID=15085623

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55132622A Pending JPS5758323A (en) 1980-09-24 1980-09-24 Method for forming insulating film on compound semiconductor

Country Status (1)

Country Link
JP (1) JPS5758323A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5214003A (en) * 1989-05-31 1993-05-25 Nippon Mining Co., Ltd. Process for producing a uniform oxide layer on a compound semiconductor substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5214003A (en) * 1989-05-31 1993-05-25 Nippon Mining Co., Ltd. Process for producing a uniform oxide layer on a compound semiconductor substrate

Similar Documents

Publication Publication Date Title
JPS56142630A (en) Manufacture of semiconductor device
JPS55113335A (en) Manufacture of semiconductor device
JPS5758323A (en) Method for forming insulating film on compound semiconductor
JPS5659694A (en) Manufacture of thin film
JPS5522862A (en) Manufacturing method for silicon oxidized film
JPS56162841A (en) Forming method for insulating film of compound semiconductor
JPS57115823A (en) Manufacture of amorphous semiconductor film
JPS5756942A (en) Manufacture of silicon semiconductor device
JPS57199227A (en) Manufacture of semiconductor device
JPS5633840A (en) Manufacture of semiconductor device
JPS56155528A (en) Method of diffusing impurity into semiconductor substrate
JPS57148344A (en) Manufacturing equipment for semiconductor
JPS57180165A (en) Semiconductor device and manufacture thereof
KR910001892A (en) Phosphorus Doped Oxide Flow Process Method
JPS56130940A (en) Manufacture of semiconductor device
Farley et al. Complex Compensation of Ge Pulse‐Diffused into GaAs
JPS55133556A (en) Planar semiconductor device and method of fabricating the same
JPS5633853A (en) Semiconductor device
JPS5693315A (en) Manufacture of semiconductor device
JPS54153569A (en) Heat treatment method for semiconductor wafer
JPS5666030A (en) Manufacture of semiconductor device
JPS5660023A (en) Manufacture of semiconductor device
JPS6459858A (en) Manufacture of semiconductor device
JPS5771806A (en) Forming method of nitrided film
JPS57204135A (en) Manufacture of semiconductor device