JPS5756937A - Assembling method for semiconductor device - Google Patents

Assembling method for semiconductor device

Info

Publication number
JPS5756937A
JPS5756937A JP55131351A JP13135180A JPS5756937A JP S5756937 A JPS5756937 A JP S5756937A JP 55131351 A JP55131351 A JP 55131351A JP 13135180 A JP13135180 A JP 13135180A JP S5756937 A JPS5756937 A JP S5756937A
Authority
JP
Japan
Prior art keywords
electrodes
chips
bumps
heights
larger
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55131351A
Other languages
Japanese (ja)
Inventor
Hiroshi Sakai
Shusaku Shibata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55131351A priority Critical patent/JPS5756937A/en
Publication of JPS5756937A publication Critical patent/JPS5756937A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To prevent the damage of a structure on the upper surface by providing electrodes of different stepwise heights for detecting at the edges of facing surfaces of semiconductor chips, thereby readily confirming the chip collision time point. CONSTITUTION:Bumps 6, 3 are provided through protective films 1, 5' of respective chips 1, 5 and electrodes 15, 15' and 11-14' are formed in uniform height on the protective films. The film 1' is stepwisely formed at the end 1b, the heights of the maximum electrodes 11, 11' are larger than the total height of the pads 6, 8, and the maximum difference of the electrodes is set to larger than the irregularity of the heights of the bumps in the ranges 1a, 5a. Battery, ammeter, changeover switch the connected to the respective electrodes. The heights of the bumps are measured in advance, switches S, S' are changed over to confirm the continuity, and the chips are approached. Then, the contacts of all the bumps can be effectively performed. When electrodes 21-24' are additionally provided at right angle with respect to the metallic electrodes 11-14, the interval of the chips can be controlled and the positions of the chips can also be performed.
JP55131351A 1980-09-20 1980-09-20 Assembling method for semiconductor device Pending JPS5756937A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55131351A JPS5756937A (en) 1980-09-20 1980-09-20 Assembling method for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55131351A JPS5756937A (en) 1980-09-20 1980-09-20 Assembling method for semiconductor device

Publications (1)

Publication Number Publication Date
JPS5756937A true JPS5756937A (en) 1982-04-05

Family

ID=15055896

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55131351A Pending JPS5756937A (en) 1980-09-20 1980-09-20 Assembling method for semiconductor device

Country Status (1)

Country Link
JP (1) JPS5756937A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6121062A (en) * 1993-08-13 2000-09-19 Fujitsu Limited Process of fabricating semiconductor unit employing bumps to bond two components

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6121062A (en) * 1993-08-13 2000-09-19 Fujitsu Limited Process of fabricating semiconductor unit employing bumps to bond two components
EP0638926B1 (en) * 1993-08-13 2004-04-21 Fujitsu Limited Process of fabricating semiconductor unit employing bumps to bond two components

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