JPS57555A - Retreat detector - Google Patents
Retreat detectorInfo
- Publication number
- JPS57555A JPS57555A JP7372880A JP7372880A JPS57555A JP S57555 A JPS57555 A JP S57555A JP 7372880 A JP7372880 A JP 7372880A JP 7372880 A JP7372880 A JP 7372880A JP S57555 A JPS57555 A JP S57555A
- Authority
- JP
- Japan
- Prior art keywords
- retreat
- during
- advancing
- terminal
- phase
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
- G01P13/00—Indicating or recording presence, absence, or direction, of movement
- G01P13/02—Indicating direction only, e.g. by weather vane
- G01P13/04—Indicating positive or negative direction of a linear movement or clockwise or anti-clockwise direction of a rotational movement
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Indicating Or Recording The Presence, Absence, Or Direction Of Movement (AREA)
- Electric Propulsion And Braking For Vehicles (AREA)
Abstract
PURPOSE:To detect retreat accurately by measuring retreat distance by the use of an up-down counter in a driving system for new traffic system vehicles. CONSTITUTION:Two speed pulses A, B are of such a phase relation that during advancing A is in phase advance by 90 deg. than B and the trailing edge of A and B superpose and that during retreating A is in phase delay by 90 deg. than B and the leading edge of A superposes on B. Pulses are outputted to F during advancing and to E during retreating by way of an inverter 1, differentiators 2, 3 and AND gates 4, 5. When an advance direction select switch 14 is at the advancing TF, a binary up- down counter circuit 15 down counts by an up-down control terminal UD, and when the count value from a clock pulse input terminal CK goes 0, the counting is stopped by a borrow terminal BR. In the case of the retreat time TB, the circuit 15 up count, and when the count value of the counter 15 attains the value of a set switch 17, a retreat signal is obtained from the output terminal OUT of a binary comparator 16.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7372880A JPS57555A (en) | 1980-06-03 | 1980-06-03 | Retreat detector |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7372880A JPS57555A (en) | 1980-06-03 | 1980-06-03 | Retreat detector |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57555A true JPS57555A (en) | 1982-01-05 |
JPS6146786B2 JPS6146786B2 (en) | 1986-10-16 |
Family
ID=13526574
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7372880A Granted JPS57555A (en) | 1980-06-03 | 1980-06-03 | Retreat detector |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57555A (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0514553Y2 (en) * | 1987-07-22 | 1993-04-19 |
-
1980
- 1980-06-03 JP JP7372880A patent/JPS57555A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6146786B2 (en) | 1986-10-16 |
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