JPS5754376A - - Google Patents

Info

Publication number
JPS5754376A
JPS5754376A JP56122354A JP12235481A JPS5754376A JP S5754376 A JPS5754376 A JP S5754376A JP 56122354 A JP56122354 A JP 56122354A JP 12235481 A JP12235481 A JP 12235481A JP S5754376 A JPS5754376 A JP S5754376A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56122354A
Inventor
Gyuntaa Adamu Furitsutsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Micronas GmbH
Original Assignee
Deutsche ITT Industries GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche ITT Industries GmbH filed Critical Deutsche ITT Industries GmbH
Publication of JPS5754376A publication Critical patent/JPS5754376A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
JP56122354A 1980-08-04 1981-08-04 Pending JPS5754376A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19803029539 DE3029539A1 (de) 1980-08-04 1980-08-04 Nichtfluechtige, programmierbare integrierte halbleiterspeicherzelle

Publications (1)

Publication Number Publication Date
JPS5754376A true JPS5754376A (ja) 1982-03-31

Family

ID=6108866

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56122354A Pending JPS5754376A (ja) 1980-08-04 1981-08-04

Country Status (4)

Country Link
US (1) US4425631A (ja)
EP (1) EP0045469B1 (ja)
JP (1) JPS5754376A (ja)
DE (2) DE3029539A1 (ja)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59163143A (ja) * 1983-02-15 1984-09-14 トライ・エングル　システムズ　リミテド 包装容器の要素及びその形成方法
JPS6127814U (ja) * 1984-07-25 1986-02-19 中央紙器工業株式会社 段ボ−ル箱の壁面補強構造
JPS6332121U (ja) * 1986-08-19 1988-03-02
JPS6432328U (ja) * 1987-08-20 1989-02-28
JPH0248933A (ja) * 1988-08-10 1990-02-19 Fuji Seal Kogyo Kk 化粧箱の製造方法

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5857750A (ja) * 1981-10-01 1983-04-06 Seiko Instr & Electronics Ltd 不揮発性半導体メモリ
JPS59155968A (ja) * 1983-02-25 1984-09-05 Toshiba Corp 半導体記憶装置
IT1199828B (it) * 1986-12-22 1989-01-05 Sgs Microelettronica Spa Cella di memoria eeprom a singolo livello di polisilicio scrivibile e cancellabile bit a bit
USRE37308E1 (en) * 1986-12-22 2001-08-07 Stmicroelectronics S.R.L. EEPROM memory cell with a single level of polysilicon programmable and erasable bit by bit
US4924278A (en) * 1987-06-19 1990-05-08 Advanced Micro Devices, Inc. EEPROM using a merged source and control gate
JPH07120719B2 (ja) * 1987-12-02 1995-12-20 三菱電機株式会社 半導体記憶装置
US4855955A (en) * 1988-04-08 1989-08-08 Seeq Technology, Inc. Three transistor high endurance eeprom cell
US5089433A (en) * 1988-08-08 1992-02-18 National Semiconductor Corporation Bipolar field-effect electrically erasable programmable read only memory cell and method of manufacture
JP3293893B2 (ja) * 1991-12-09 2002-06-17 株式会社東芝 半導体不揮発性記憶装置の製造方法
DE69322643T2 (de) * 1992-06-19 1999-05-20 Lattice Semiconductor Corp Hil Flash e?2 prom zelle mit nur einer polysiliziumschicht
US5301150A (en) * 1992-06-22 1994-04-05 Intel Corporation Flash erasable single poly EPROM device
US5418390A (en) * 1993-03-19 1995-05-23 Lattice Semiconductor Corporation Single polysilicon layer E2 PROM cell
GB9311129D0 (en) * 1993-05-28 1993-07-14 Philips Electronics Uk Ltd Electronic devices with-film circuit elements forming a sampling circuit
JP2663863B2 (ja) * 1994-04-19 1997-10-15 日本電気株式会社 不揮発性半導体記憶装置
US5753951A (en) * 1995-07-25 1998-05-19 International Business Machines Corporation EEPROM cell with channel hot electron programming and method for forming the same
US5895945A (en) * 1995-11-14 1999-04-20 United Microelectronics Corporation Single polysilicon neuron MOSFET
US5841165A (en) * 1995-11-21 1998-11-24 Programmable Microelectronics Corporation PMOS flash EEPROM cell with single poly
US5736764A (en) * 1995-11-21 1998-04-07 Programmable Microelectronics Corporation PMOS flash EEPROM cell with single poly
US5761121A (en) * 1996-10-31 1998-06-02 Programmable Microelectronics Corporation PMOS single-poly non-volatile memory structure
EP0776049B1 (en) * 1995-11-21 2000-08-30 Programmable Microelectronics Corporation PMOS single-poly non-volatile memory structure
US6091103A (en) * 1998-03-05 2000-07-18 Chao; Robert L. Integrated electrically adjustable analog transistor devices having multiple device sub-structures and methods therefor
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
US20230410898A1 (en) * 2020-10-19 2023-12-21 Rambus Inc. Flash memory device with photon assisted programming

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4035820A (en) * 1975-12-29 1977-07-12 Texas Instruments Incorporated Adjustment of avalanche voltage in DIFMOS memory devices by control of impurity doping

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59163143A (ja) * 1983-02-15 1984-09-14 トライ・エングル　システムズ　リミテド 包装容器の要素及びその形成方法
JPS6127814U (ja) * 1984-07-25 1986-02-19 中央紙器工業株式会社 段ボ−ル箱の壁面補強構造
JPS6332121U (ja) * 1986-08-19 1988-03-02
JPS6432328U (ja) * 1987-08-20 1989-02-28
JPH0343140Y2 (ja) * 1987-08-20 1991-09-10
JPH0248933A (ja) * 1988-08-10 1990-02-19 Fuji Seal Kogyo Kk 化粧箱の製造方法

Also Published As

Publication number Publication date
DE3174621D1 (de) 1986-06-19
EP0045469A2 (de) 1982-02-10
EP0045469A3 (en) 1984-05-16
US4425631A (en) 1984-01-10
EP0045469B1 (de) 1986-05-14
DE3029539A1 (de) 1982-03-11

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