JPS5752290A - Parallel connection system for originating register of pulse code modulation switchboard - Google Patents
Parallel connection system for originating register of pulse code modulation switchboardInfo
- Publication number
- JPS5752290A JPS5752290A JP12685180A JP12685180A JPS5752290A JP S5752290 A JPS5752290 A JP S5752290A JP 12685180 A JP12685180 A JP 12685180A JP 12685180 A JP12685180 A JP 12685180A JP S5752290 A JPS5752290 A JP S5752290A
- Authority
- JP
- Japan
- Prior art keywords
- coj
- memory
- exto
- extension
- originating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Sub-Exchange Stations And Push- Button Telephones (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
Abstract
PURPOSE:To improve the working efficiency of a service channel, by writing and leaving an originating register in a receiving path memory at the point of time when it has become possible to send and receive a signal between an extension and a trunk. CONSTITUTION:In a highway speech memory HWSM, service PCM data from an extension EXTo and a trunk COj related to connection are stored in memory addresses corresponding to the respective time slots, by a fixed sequential pulse. The PCM data stored in the HWSM are sent out to a transmission highway path THWn in accordance with the information stored in a transmission path memory TPM, and are transferred to the COj. In this way, a signal can be sent and received between the EXTo and the COj. At this point of time, an originating register REGK is written and left in a memory address corresponding to a service channel which has been assigned to an originating extension of a receiving path memory RPM. In this way, a dial signal from the EXTo, which is sent out to the COj is monitored.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12685180A JPS5752290A (en) | 1980-09-12 | 1980-09-12 | Parallel connection system for originating register of pulse code modulation switchboard |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12685180A JPS5752290A (en) | 1980-09-12 | 1980-09-12 | Parallel connection system for originating register of pulse code modulation switchboard |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5752290A true JPS5752290A (en) | 1982-03-27 |
Family
ID=14945416
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12685180A Pending JPS5752290A (en) | 1980-09-12 | 1980-09-12 | Parallel connection system for originating register of pulse code modulation switchboard |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5752290A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58154136U (en) * | 1982-04-09 | 1983-10-15 | 江崎グリコ株式会社 | Easy-open bag-like container |
-
1980
- 1980-09-12 JP JP12685180A patent/JPS5752290A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58154136U (en) * | 1982-04-09 | 1983-10-15 | 江崎グリコ株式会社 | Easy-open bag-like container |
JPS6242908Y2 (en) * | 1982-04-09 | 1987-11-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
GB1529075A (en) | Communication network | |
GB1304790A (en) | ||
JPS5752290A (en) | Parallel connection system for originating register of pulse code modulation switchboard | |
IT1063751B (en) | TDM signal line controller - has cycle time divided into phases reflecting number of control phases | |
KR920009123A (en) | Cell switch | |
SU845811A3 (en) | Time commutator | |
JPS56156978A (en) | Memory control system | |
KR840002801A (en) | Storage of a telecommunication exchange | |
SE9201861D0 (en) | DEVICE TO GENERATE VILOCODES BY SELECTOR | |
FR2454242A1 (en) | TDM switching circuit - has control and buffer memory in which address depends on same contents of memory | |
SU888202A1 (en) | Buffer storage | |
SU649153A1 (en) | Arrangement for time-related switching of asynchronous low-and high-speed channels | |
SU1522422A1 (en) | Temporal communication device | |
SU581592A2 (en) | Apparatus for time-oriented asynchronous switching of pulse signals | |
GB1263007A (en) | Improvements in or relating to pcm time-division multiplex exchange systems | |
SU1035825A1 (en) | Apparatus for transmitting discrete information | |
SU1167752A1 (en) | Device for forming frequency-shift keyed signal | |
SU446061A1 (en) | Device for priority service of messages | |
JPS5732196A (en) | Channel converter | |
SU705695A1 (en) | Asynchronous three-dimensional switching circuit | |
SU1091358A1 (en) | Address information transmission device | |
SU752444A1 (en) | Decoder | |
SU773955A1 (en) | Device for time switching of asynchronous digital signals | |
SU1700762A1 (en) | Asynchronous digital signals time switching device | |
JPS56156093A (en) | Channel memory control system for time-division switchboard |