JPS5748869A - Compensation circuit for background density - Google Patents

Compensation circuit for background density

Info

Publication number
JPS5748869A
JPS5748869A JP55123218A JP12321880A JPS5748869A JP S5748869 A JPS5748869 A JP S5748869A JP 55123218 A JP55123218 A JP 55123218A JP 12321880 A JP12321880 A JP 12321880A JP S5748869 A JPS5748869 A JP S5748869A
Authority
JP
Japan
Prior art keywords
circuit
resistor
given
white
background density
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55123218A
Other languages
Japanese (ja)
Inventor
Takashi Sugizaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Iwatsu Electric Co Ltd
Iwasaki Tsushinki KK
Original Assignee
Iwatsu Electric Co Ltd
Iwasaki Tsushinki KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Iwatsu Electric Co Ltd, Iwasaki Tsushinki KK filed Critical Iwatsu Electric Co Ltd
Priority to JP55123218A priority Critical patent/JPS5748869A/en
Publication of JPS5748869A publication Critical patent/JPS5748869A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/40Picture signal circuits
    • H04N1/403Discrimination between the two tones in the picture signal of a two-tone original

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Facsimile Image Signal Circuits (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To keep the video quality in excellent manner, by following the threshold level to an optimum level quickly, against the change in the background density and contrast in the original, in a background density compensation circuit provided at a facsimile transmitter and the like. CONSTITUTION:An analog video signal is sample-held and given to a white peak value detection circuit 2' and another circuit 17. The time constant consisting of a capacitor 25 and a resistor 26 of the circuit 17 is sufficiently greater than that consisting of a capacitor 8 and a resistor 9. An output voltage V of the circuit 17 is split with registors 18, 19, 20, and a voltage division VH is given to one end of the registor 9 and a voltage division VL is given to one end of a resistor 14 of a circuit 3'. Thus, even if white or black signals are consecutively present (i.e., black or white signals are absent), since the threshold value is existing between the peak value voltage VSH or VSL or consecutive chroma signals and the voltage division VH or VL, accurate binarization can be made.
JP55123218A 1980-09-05 1980-09-05 Compensation circuit for background density Pending JPS5748869A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55123218A JPS5748869A (en) 1980-09-05 1980-09-05 Compensation circuit for background density

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55123218A JPS5748869A (en) 1980-09-05 1980-09-05 Compensation circuit for background density

Publications (1)

Publication Number Publication Date
JPS5748869A true JPS5748869A (en) 1982-03-20

Family

ID=14855116

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55123218A Pending JPS5748869A (en) 1980-09-05 1980-09-05 Compensation circuit for background density

Country Status (1)

Country Link
JP (1) JPS5748869A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58196766A (en) * 1982-05-12 1983-11-16 Canon Inc Binary coding device of picture signal
JPS596333U (en) * 1982-07-05 1984-01-17 沖電気工業株式会社 Automatic threshold level control circuit
JPS6076956A (en) * 1983-09-30 1985-05-01 Isuzu Motors Ltd Deburring robot
JPH0360277A (en) * 1989-07-28 1991-03-15 Canon Inc Picture binarizing system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58196766A (en) * 1982-05-12 1983-11-16 Canon Inc Binary coding device of picture signal
JPS596333U (en) * 1982-07-05 1984-01-17 沖電気工業株式会社 Automatic threshold level control circuit
JPS6076956A (en) * 1983-09-30 1985-05-01 Isuzu Motors Ltd Deburring robot
JPH0360277A (en) * 1989-07-28 1991-03-15 Canon Inc Picture binarizing system

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