JPS5737952A - Code conversion system - Google Patents

Code conversion system

Info

Publication number
JPS5737952A
JPS5737952A JP11205880A JP11205880A JPS5737952A JP S5737952 A JPS5737952 A JP S5737952A JP 11205880 A JP11205880 A JP 11205880A JP 11205880 A JP11205880 A JP 11205880A JP S5737952 A JPS5737952 A JP S5737952A
Authority
JP
Japan
Prior art keywords
codes
converted
kinds
parallel
code
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11205880A
Other languages
Japanese (ja)
Inventor
Koji Nishizaki
Masanori Arai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP11205880A priority Critical patent/JPS5737952A/en
Publication of JPS5737952A publication Critical patent/JPS5737952A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4917—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes
    • H04L25/4923—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes using ternary codes
    • H04L25/4925—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes using ternary codes using balanced bipolar ternary codes

Landscapes

  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To condense the maximum continuous number of the same codes and DSV, by using conversion rules provided with three kinds or four kinds modes, in a code converting method which decides the mode of output codes in accordance with the algebraic sum. CONSTITUTION:After continuous 2-bits of an input binary code row 1N are inputted into a series-parallel converting circuit 1 and converted into parallel codes, the 2-bit parallel codes are inputted into a code converting circuit 6 an converted into 3-bit parallel codes by using conversion rules of three kinds modes A-C or four kinds mode A-D. The converted 3-bit parallel codes are outputted after they are converted into series codes by a parallel-series converting circuit 4. Therefore, both maximum continuous number and digital sum variation DSV of the code are reduced and intercode interferences of the receiving waveform are minimized. Moreover, extraction of timing block is made easy.
JP11205880A 1980-08-14 1980-08-14 Code conversion system Pending JPS5737952A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11205880A JPS5737952A (en) 1980-08-14 1980-08-14 Code conversion system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11205880A JPS5737952A (en) 1980-08-14 1980-08-14 Code conversion system

Publications (1)

Publication Number Publication Date
JPS5737952A true JPS5737952A (en) 1982-03-02

Family

ID=14576981

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11205880A Pending JPS5737952A (en) 1980-08-14 1980-08-14 Code conversion system

Country Status (1)

Country Link
JP (1) JPS5737952A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59214358A (en) * 1983-02-15 1984-12-04 ヒュンダイ、エレクトロニクス、インダストリーズ、カムパニー、リミテッド Group coding system for transmitting serial data
JPS62287469A (en) * 1986-06-06 1987-12-14 Hitachi Medical Corp Magnetic recording and reproducing device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59214358A (en) * 1983-02-15 1984-12-04 ヒュンダイ、エレクトロニクス、インダストリーズ、カムパニー、リミテッド Group coding system for transmitting serial data
JPS62287469A (en) * 1986-06-06 1987-12-14 Hitachi Medical Corp Magnetic recording and reproducing device

Similar Documents

Publication Publication Date Title
NZ210858A (en) Digital information transmission with code conversion to limit disparity
ATE53727T1 (en) ARRANGEMENT FOR ENCODING N-BITS INFORMATION INTO AN M-BITS CODEWORD ARRANGEMENT FOR DECODING M-BITS CODEWORDS INTO N-BITS INFORMATION WORDS.
DE3168695D1 (en) Process for the parallel/series conversion of a digital parallel sequence
JPS5737952A (en) Code conversion system
GB2168577B (en) System for converting a voice signal to a pitch signal
GB2162024B (en) Encoding method for time encoded data
SU1427573A1 (en) Binary code converter
JPS56101614A (en) Binary code converting method
JPS5731242A (en) Coder
JPS57104371A (en) Profile code converter
SU1001078A1 (en) Unit-counting code-to-binary code converter
JPS56114464A (en) Code conversion system
JPS5564459A (en) Code converter
JPS5730453A (en) Variable-length code transmission system
SU618848A1 (en) Method of converting continuous and pulsed signals into cycle code
SU1494210A1 (en) Digital filter with multilevel delta modulation
JPS6416026A (en) Consecutive comparision type a/d converting circuit
JPS57166731A (en) Converter for converting binary-coded decimal number into pure binary number
JPS5725721A (en) Digital-to-analog converter
JPS5471913A (en) Code transmission system
JPS53123042A (en) Code conversion system
JPS5748847A (en) Code processing system
KR900007932B1 (en) Code conversion method and apparatus to obtain rll code
JPS56164626A (en) Digital-to-analog converter
JPS57171833A (en) Code converting system