JPS56114464A - Code conversion system - Google Patents

Code conversion system

Info

Publication number
JPS56114464A
JPS56114464A JP1633280A JP1633280A JPS56114464A JP S56114464 A JPS56114464 A JP S56114464A JP 1633280 A JP1633280 A JP 1633280A JP 1633280 A JP1633280 A JP 1633280A JP S56114464 A JPS56114464 A JP S56114464A
Authority
JP
Japan
Prior art keywords
rom
code conversion
binary data
ternary
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1633280A
Other languages
Japanese (ja)
Inventor
Tadao Ogawa
Takemi Endo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP1633280A priority Critical patent/JPS56114464A/en
Publication of JPS56114464A publication Critical patent/JPS56114464A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4917—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes
    • H04L25/4923—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes using ternary codes
    • H04L25/4925—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes using ternary codes using balanced bipolar ternary codes

Landscapes

  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE:To enable a signal to contain many timing components by performing code conversion which increases change points of a signal by making the ending of each output word different in polarity from the initial bit. CONSTITUTION:A binary data train of repetitive pulse freqency f0Hz is converted into four binary data trains by series-parallel converting circuit PS and 1/4 frequency divider DV. Those four binary data trains are used as addresses of ROM. This ROM has the contents which convert binary four-digit input words into ternary three-digit outputs according to a code conversion table and the data outputs of ROM are made into a ternary pulse train of repetitive frequency 3/4f0 by parallel- series converting circuit SP.
JP1633280A 1980-02-13 1980-02-13 Code conversion system Pending JPS56114464A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1633280A JPS56114464A (en) 1980-02-13 1980-02-13 Code conversion system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1633280A JPS56114464A (en) 1980-02-13 1980-02-13 Code conversion system

Publications (1)

Publication Number Publication Date
JPS56114464A true JPS56114464A (en) 1981-09-09

Family

ID=11913475

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1633280A Pending JPS56114464A (en) 1980-02-13 1980-02-13 Code conversion system

Country Status (1)

Country Link
JP (1) JPS56114464A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2526616A1 (en) * 1982-02-11 1983-11-10 Cit Alcatel METHOD FOR SYNCHRONOUS DATA TRANSMISSION AND DEVICES FOR ITS IMPLEMENTATION
EP0901255A1 (en) * 1997-09-08 1999-03-10 STMicroelectronics SA Method and system for transcoding digital data

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2526616A1 (en) * 1982-02-11 1983-11-10 Cit Alcatel METHOD FOR SYNCHRONOUS DATA TRANSMISSION AND DEVICES FOR ITS IMPLEMENTATION
EP0901255A1 (en) * 1997-09-08 1999-03-10 STMicroelectronics SA Method and system for transcoding digital data
FR2768279A1 (en) * 1997-09-08 1999-03-12 St Microelectronics Sa METHOD AND DEVICE FOR DIGITAL INFORMATION BASEBAND TRANSCODING
US6307864B1 (en) 1997-09-08 2001-10-23 Stmicroelectronics S.A. Process and device for the baseband transcoding of digital information

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