JPS5734225A - Restarting apparatus for central processing unit - Google Patents
Restarting apparatus for central processing unitInfo
- Publication number
- JPS5734225A JPS5734225A JP10900680A JP10900680A JPS5734225A JP S5734225 A JPS5734225 A JP S5734225A JP 10900680 A JP10900680 A JP 10900680A JP 10900680 A JP10900680 A JP 10900680A JP S5734225 A JPS5734225 A JP S5734225A
- Authority
- JP
- Japan
- Prior art keywords
- timer
- circuit
- signal
- output
- processing unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/24—Resetting means
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
Abstract
PURPOSE:To prevent system down due to external noise and stabilize the system using a watchdog timer by installing a restarting circuit. CONSTITUTION:A restart processing circuit 3 is installed in the output side of a watchdog timer WDT2 to introduce an abnormal signal of WDT2 into an AND circuit AND through the 1st timer part 31 and output the output signal found from ''and'' between the 1st timer part 31 and the 2nd timer part set up to longer time than the 1st timer to a restart output part. Although the timer part 31 outputs an ON signal to the AND circuit AND when CPU1 is abnormal, the timer of the timer part does not operate at the time and an OFF signal is outputted to the AND circuit AND, so that CPU1 is not restarted. Thus, the failure due to external noise can be discriminated from that of CPU itself.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55109006A JPS5924460B2 (en) | 1980-08-08 | 1980-08-08 | Central processing unit restart device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55109006A JPS5924460B2 (en) | 1980-08-08 | 1980-08-08 | Central processing unit restart device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5734225A true JPS5734225A (en) | 1982-02-24 |
JPS5924460B2 JPS5924460B2 (en) | 1984-06-09 |
Family
ID=14499172
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55109006A Expired JPS5924460B2 (en) | 1980-08-08 | 1980-08-08 | Central processing unit restart device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5924460B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0371240A (en) * | 1989-08-11 | 1991-03-27 | Nec Corp | Watch-dog timer circuit |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
MX2020010022A (en) | 2018-03-29 | 2020-12-07 | Mt Tec Llc | Automobile component. |
-
1980
- 1980-08-08 JP JP55109006A patent/JPS5924460B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0371240A (en) * | 1989-08-11 | 1991-03-27 | Nec Corp | Watch-dog timer circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS5924460B2 (en) | 1984-06-09 |
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