JPS572521A - Forming method for self-alignment multilayer wire - Google Patents

Forming method for self-alignment multilayer wire

Info

Publication number
JPS572521A
JPS572521A JP7554680A JP7554680A JPS572521A JP S572521 A JPS572521 A JP S572521A JP 7554680 A JP7554680 A JP 7554680A JP 7554680 A JP7554680 A JP 7554680A JP S572521 A JPS572521 A JP S572521A
Authority
JP
Japan
Prior art keywords
metal
wire
self
patterned
photo resist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7554680A
Other languages
Japanese (ja)
Inventor
Sukeyoshi Tsunekawa
Yoshio Honma
Yukiyoshi Harada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7554680A priority Critical patent/JPS572521A/en
Publication of JPS572521A publication Critical patent/JPS572521A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To enhance the reliability of a microminiature multilayer wire by burying a metal or an insulator by a bias sputtering method in the recesses of a substrate, thereby suppressing the disconnection and the shortcircuitting of the wire. CONSTITUTION:An oxidized film 42 is formed on a silicon substrate 41, a photo resist is patterned on a metal 43 to become a wire formed by sputtering on the entire surface of the substrate, and with the photo resist thus patterned as a mask the metal 43 is patterned. A bias sputtering is performed thereon to equalize the surface of the metal 43 to the surface of an SiO2 film 45, and the exposed photo resist is isolated by etching. Thus, the SiO2 film can be so buried between metallic wires in a self-aligning manner that the surfaces may approximately coincide with one another. When these steps are repeated, a multilayer wire can be formed.
JP7554680A 1980-06-06 1980-06-06 Forming method for self-alignment multilayer wire Pending JPS572521A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7554680A JPS572521A (en) 1980-06-06 1980-06-06 Forming method for self-alignment multilayer wire

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7554680A JPS572521A (en) 1980-06-06 1980-06-06 Forming method for self-alignment multilayer wire

Publications (1)

Publication Number Publication Date
JPS572521A true JPS572521A (en) 1982-01-07

Family

ID=13579298

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7554680A Pending JPS572521A (en) 1980-06-06 1980-06-06 Forming method for self-alignment multilayer wire

Country Status (1)

Country Link
JP (1) JPS572521A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6324625A (en) * 1986-07-16 1988-02-02 Mitsubishi Electric Corp Semiconductor device and its manufacture
JPS6328704A (en) * 1986-07-23 1988-02-06 Ohtsu Tire & Rubber Co Ltd Radial tyre

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6324625A (en) * 1986-07-16 1988-02-02 Mitsubishi Electric Corp Semiconductor device and its manufacture
JPS6328704A (en) * 1986-07-23 1988-02-06 Ohtsu Tire & Rubber Co Ltd Radial tyre

Similar Documents

Publication Publication Date Title
JPS57176746A (en) Semiconductor integrated circuit and manufacture thereof
MY113878A (en) Semiconductor apparatus having wiring groove and contact hole formed in self-alignment manner and method of fabricating the same
JPS55163860A (en) Manufacture of semiconductor device
EP0401688A3 (en) Method of forming electrical contact between interconnection layers located at different layer levels
ES8507730A1 (en) Method of forming ohmic contacts.
KR950009963A (en) Dry etching method
JPS572521A (en) Forming method for self-alignment multilayer wire
JPS57145340A (en) Manufacture of semiconductor device
JPS5513904A (en) Semiconductor device and its manufacturing method
JPS56148846A (en) Manufacture of circuit pattern
JPS56148845A (en) Manufacture of semiconductor device
JPS56130925A (en) Manufacture of semiconductor device
JPS6477143A (en) Formation of copper thin film wiring
JPS56104450A (en) Manufacture of semiconductor device
JPS5752130A (en) Forming method for electrode
JPS559415A (en) Semiconductor manufacturing method
JPS57170551A (en) Manufacture of semiconductor device
JPS5723224A (en) Manufacture of semiconductor integrated circuit
JPS57114254A (en) Semiconductor device and manufacture thereof
JPS55130140A (en) Fabricating method of semiconductor device
JPS57184232A (en) Manufacture of semiconductor device
JPS56165339A (en) Semiconductor device
JPS5380167A (en) Manufacture of semiconductor device
JPS56130951A (en) Manufacture of semiconductor device
JPS61272981A (en) Manufacture of josephson device