JPS57211828A - Selecting circuit - Google Patents
Selecting circuitInfo
- Publication number
- JPS57211828A JPS57211828A JP9637981A JP9637981A JPS57211828A JP S57211828 A JPS57211828 A JP S57211828A JP 9637981 A JP9637981 A JP 9637981A JP 9637981 A JP9637981 A JP 9637981A JP S57211828 A JPS57211828 A JP S57211828A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- turned
- selective signal
- outputted
- inputted
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/693—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
Landscapes
- Electronic Switches (AREA)
Abstract
PURPOSE:To prevent 2 signals or more to be selected by connecting gate circuits for controlling plural MOSFETs (MOS field effect transistors), respectively and inhibiting the gate circuits when another selective signal is inputted. CONSTITUTION:When a selective signal is applied only to a terminal 12, an output of an NOR gate is turned to the high level, an MOSFET 28 is turned on and an input signal of a terminal 33 is selected and outputted from an output terminal 38. When a selective signal is inputted both the terminals 12, 13, the outputs of NOR gates 23, 18-21 are turned to the low level and all the MOSFETs 28-32 are turned off. However, the input signals from the terminal 33 are continued to be outputted to the terminal 38 by the capacity of the terminal 38.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9637981A JPS57211828A (en) | 1981-06-22 | 1981-06-22 | Selecting circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9637981A JPS57211828A (en) | 1981-06-22 | 1981-06-22 | Selecting circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57211828A true JPS57211828A (en) | 1982-12-25 |
Family
ID=14163323
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9637981A Pending JPS57211828A (en) | 1981-06-22 | 1981-06-22 | Selecting circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57211828A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2019080120A (en) * | 2017-10-20 | 2019-05-23 | 新日本無線株式会社 | High-frequency switch device |
-
1981
- 1981-06-22 JP JP9637981A patent/JPS57211828A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2019080120A (en) * | 2017-10-20 | 2019-05-23 | 新日本無線株式会社 | High-frequency switch device |
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