JPS57208154A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS57208154A JPS57208154A JP56093146A JP9314681A JPS57208154A JP S57208154 A JPS57208154 A JP S57208154A JP 56093146 A JP56093146 A JP 56093146A JP 9314681 A JP9314681 A JP 9314681A JP S57208154 A JPS57208154 A JP S57208154A
- Authority
- JP
- Japan
- Prior art keywords
- chip
- measuring
- voltage
- terminal
- pads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
- Wire Bonding (AREA)
Abstract
PURPOSE:To reduce the size of a chip by commonly using the measuring pads of the adjacent chips, thereby reducing the area of the chips occupied by the pads. CONSTITUTION:In case of measuring a chip 1, an element 15 is varied to low resistance by the voltage of a probe applied to a terminal 16, but no voltage is applied to the terminal 16' of a chip 2 which is not measured. Accordingly, an element 15' is high resistance. Thus, a measuring electric signal applied by the probe to a measuring pad 13 is transmitted through the element 15 to the internal circuit of the chip 1, but the chip 2 is insulated via the element 15'. In this manner, a voltage is applied to the element which electrically connects the measuring pad to the internal circuit via low resistance and at least one terminal to be controlled may be sufficient enough, thereby the chip area does not occupy largely.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56093146A JPS57208154A (en) | 1981-06-17 | 1981-06-17 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56093146A JPS57208154A (en) | 1981-06-17 | 1981-06-17 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57208154A true JPS57208154A (en) | 1982-12-21 |
Family
ID=14074387
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56093146A Pending JPS57208154A (en) | 1981-06-17 | 1981-06-17 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57208154A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0180776A2 (en) * | 1984-10-05 | 1986-05-14 | Fujitsu Limited | Chip-on-chip semiconductor device |
JPH05175296A (en) * | 1991-12-25 | 1993-07-13 | Kawasaki Steel Corp | Semiconductor integrated circuit |
-
1981
- 1981-06-17 JP JP56093146A patent/JPS57208154A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0180776A2 (en) * | 1984-10-05 | 1986-05-14 | Fujitsu Limited | Chip-on-chip semiconductor device |
JPH05175296A (en) * | 1991-12-25 | 1993-07-13 | Kawasaki Steel Corp | Semiconductor integrated circuit |
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