JPS57207491A - Digital signal receiver - Google Patents

Digital signal receiver

Info

Publication number
JPS57207491A
JPS57207491A JP9325981A JP9325981A JPS57207491A JP S57207491 A JPS57207491 A JP S57207491A JP 9325981 A JP9325981 A JP 9325981A JP 9325981 A JP9325981 A JP 9325981A JP S57207491 A JPS57207491 A JP S57207491A
Authority
JP
Japan
Prior art keywords
circuit
signal
output
data
characteristic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9325981A
Other languages
Japanese (ja)
Other versions
JPS6237872B2 (en
Inventor
Hideaki Minamiguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP9325981A priority Critical patent/JPS57207491A/en
Priority to CA000394291A priority patent/CA1177138A/en
Priority to AU79594/82A priority patent/AU554973B2/en
Priority to US06/340,829 priority patent/US4461002A/en
Priority to EP19820100350 priority patent/EP0056649B1/en
Priority to DE8282100350T priority patent/DE3266081D1/en
Publication of JPS57207491A publication Critical patent/JPS57207491A/en
Publication of JPS6237872B2 publication Critical patent/JPS6237872B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/025—Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame
    • H04N7/035—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal
    • H04N7/0357—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal for error detection or correction

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Systems (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

PURPOSE:To prevent a malfunction at sampling, by detecting errors of the 1st and final bits during the period of continuous high level in a framing code signl and compensating a group delay characteristic of transmission line, in a TV character broadcast receiver. CONSTITUTION:A detected output of a circuit 1 including a VIF detector from a tuner in a receiver is fed to a gate circuit 2 via relays 12 and 13, and 1H component to which a chracter multiplex signal is inserted is picked up. The output is converted into a rectangular wave with a data slicer circuit 3, a sampling clock forming circuit 4 obtains a CRI signal to form a clock. An output of an FRC signal detection and timing pulse generating circuit 5 picks up a data signl, a serial/parallel conversion 6 is applied, and a bit error detecting circuit 14 detects the first and last bit-errors during the continuous high level period in the FRC signal. Group delay characteristic compensation circuits 10 and 12 are selected according to the detection output, and a lead characteristic is fed to the circuit 10 and a lag characteristic is provided for the circuit 11. The data after compensation is processed 7 for character signal and displayed 9 superimposingly.
JP9325981A 1981-01-20 1981-06-16 Digital signal receiver Granted JPS57207491A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP9325981A JPS57207491A (en) 1981-06-16 1981-06-16 Digital signal receiver
CA000394291A CA1177138A (en) 1981-01-20 1982-01-15 Digital signal receiver
AU79594/82A AU554973B2 (en) 1981-01-20 1982-01-18 Digital receiver error detection
US06/340,829 US4461002A (en) 1981-04-07 1982-01-19 Digital signal receiver
EP19820100350 EP0056649B1 (en) 1981-01-20 1982-01-19 Digital signal receiver
DE8282100350T DE3266081D1 (en) 1981-01-20 1982-01-19 Digital signal receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9325981A JPS57207491A (en) 1981-06-16 1981-06-16 Digital signal receiver

Publications (2)

Publication Number Publication Date
JPS57207491A true JPS57207491A (en) 1982-12-20
JPS6237872B2 JPS6237872B2 (en) 1987-08-14

Family

ID=14077487

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9325981A Granted JPS57207491A (en) 1981-01-20 1981-06-16 Digital signal receiver

Country Status (1)

Country Link
JP (1) JPS57207491A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01162082A (en) * 1987-12-18 1989-06-26 Fujitsu General Ltd Waveform equivalent circuit for character broadcast receiver

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01162082A (en) * 1987-12-18 1989-06-26 Fujitsu General Ltd Waveform equivalent circuit for character broadcast receiver
JPH0522436B2 (en) * 1987-12-18 1993-03-29 Fujitsu General Ltd

Also Published As

Publication number Publication date
JPS6237872B2 (en) 1987-08-14

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