JPS57206127A - Integral analog-to-digital converting circuit - Google Patents

Integral analog-to-digital converting circuit

Info

Publication number
JPS57206127A
JPS57206127A JP9189781A JP9189781A JPS57206127A JP S57206127 A JPS57206127 A JP S57206127A JP 9189781 A JP9189781 A JP 9189781A JP 9189781 A JP9189781 A JP 9189781A JP S57206127 A JPS57206127 A JP S57206127A
Authority
JP
Japan
Prior art keywords
power supply
error
reference voltage
discharging
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9189781A
Other languages
Japanese (ja)
Other versions
JPS6326928B2 (en
Inventor
Hiroshi Iwamoto
Haruo Tamada
Hirotoshi Tonou
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Ten Ltd
Fujitsu Ltd
Original Assignee
Denso Ten Ltd
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Ten Ltd, Fujitsu Ltd filed Critical Denso Ten Ltd
Priority to JP9189781A priority Critical patent/JPS57206127A/en
Publication of JPS57206127A publication Critical patent/JPS57206127A/en
Publication of JPS6326928B2 publication Critical patent/JPS6326928B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To prevent an error of conversion which is caused by the fluctuation of the power supply voltage, by setting the discharge current deciding reference voltage of an integral A/D converter at a level lower than the driving voltage. CONSTITUTION:The analog input is connected to the electrode of one side of a capacitor 14, the collector of a discharging TR16 of a constant current discharging circuit 15 and a comparator 17 respectively via a buffer 11 and a switch 13. An arithmetic amplifier 22 of the circuit 15 is connected to the output terminal 20 of a reference voltage generating circuit. The analog input is then compared with a threshold power supply 18, and the discharging frequency of the capacitor 14 is counted by opening the switch 13. The reference voltage VREF is always kept at a level lower than the driving voltage VCC. As a result, no counting error is caused regardless of the fluctuation of the power supply voltage. Thus the error can be eliminated for the A/D conversion.
JP9189781A 1981-06-15 1981-06-15 Integral analog-to-digital converting circuit Granted JPS57206127A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9189781A JPS57206127A (en) 1981-06-15 1981-06-15 Integral analog-to-digital converting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9189781A JPS57206127A (en) 1981-06-15 1981-06-15 Integral analog-to-digital converting circuit

Publications (2)

Publication Number Publication Date
JPS57206127A true JPS57206127A (en) 1982-12-17
JPS6326928B2 JPS6326928B2 (en) 1988-06-01

Family

ID=14039352

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9189781A Granted JPS57206127A (en) 1981-06-15 1981-06-15 Integral analog-to-digital converting circuit

Country Status (1)

Country Link
JP (1) JPS57206127A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6130817A (en) * 1984-07-23 1986-02-13 Japan Electronic Control Syst Co Ltd Integration type analog/digital converter

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5039455A (en) * 1973-08-09 1975-04-11
JPS5099462A (en) * 1973-12-28 1975-08-07
JPS5473547A (en) * 1977-11-24 1979-06-12 Hitachi Ltd Integrating a/d conversion current circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5039455A (en) * 1973-08-09 1975-04-11
JPS5099462A (en) * 1973-12-28 1975-08-07
JPS5473547A (en) * 1977-11-24 1979-06-12 Hitachi Ltd Integrating a/d conversion current circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6130817A (en) * 1984-07-23 1986-02-13 Japan Electronic Control Syst Co Ltd Integration type analog/digital converter

Also Published As

Publication number Publication date
JPS6326928B2 (en) 1988-06-01

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