JPS57203161A - One-chip microcomputer - Google Patents

One-chip microcomputer

Info

Publication number
JPS57203161A
JPS57203161A JP8764181A JP8764181A JPS57203161A JP S57203161 A JPS57203161 A JP S57203161A JP 8764181 A JP8764181 A JP 8764181A JP 8764181 A JP8764181 A JP 8764181A JP S57203161 A JPS57203161 A JP S57203161A
Authority
JP
Japan
Prior art keywords
cpu
address data
held
console
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8764181A
Other languages
Japanese (ja)
Other versions
JPH0159610B2 (en
Inventor
Yutaka Murao
Mutsuo Sugawara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP8764181A priority Critical patent/JPS57203161A/en
Publication of JPS57203161A publication Critical patent/JPS57203161A/en
Publication of JPH0159610B2 publication Critical patent/JPH0159610B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/22—Means for limiting or controlling the pin/gate ratio

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Debugging And Monitoring (AREA)
  • Microcomputers (AREA)

Abstract

PURPOSE:To monitor including debugging with a minimum number of pins, by utilizing searial transfer for the console processing of a microcomputer, and devising the internal processing of a CPU. CONSTITUTION:Address data transferred in series from an external circuit 15 for a console are fetched and stored in a shift register 16, and the address data are compared with data in a program counter 28; when the both coincide, an arithmetic processing part 12 is held. While the CPU is held, memory reading/ writing operation for debugging is performed. Further, address data for an address stop is sent ot the CPU.
JP8764181A 1981-06-08 1981-06-08 One-chip microcomputer Granted JPS57203161A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8764181A JPS57203161A (en) 1981-06-08 1981-06-08 One-chip microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8764181A JPS57203161A (en) 1981-06-08 1981-06-08 One-chip microcomputer

Publications (2)

Publication Number Publication Date
JPS57203161A true JPS57203161A (en) 1982-12-13
JPH0159610B2 JPH0159610B2 (en) 1989-12-19

Family

ID=13920603

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8764181A Granted JPS57203161A (en) 1981-06-08 1981-06-08 One-chip microcomputer

Country Status (1)

Country Link
JP (1) JPS57203161A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61127043A (en) * 1984-11-26 1986-06-14 Hitachi Ltd Data processor
JPS61211746A (en) * 1985-03-18 1986-09-19 Fujitsu Ltd Program executing control system
JPS61248143A (en) * 1985-04-26 1986-11-05 Hitachi Ltd Lsi system connecting register in parallel and hierarchically
JPS6481046A (en) * 1987-09-22 1989-03-27 Nec Corp Microprocessor unit incorporating debugging device
JPH01142950A (en) * 1987-11-30 1989-06-05 Ricoh Co Ltd Processor integrated circuit device
US5872961A (en) * 1991-05-29 1999-02-16 Nec Corporation Microcomputer allowing external monitoring of internal resources
US7814358B2 (en) 2006-07-18 2010-10-12 Denso Corporation Electronic apparatus capable of outputting data in predetermined timing regardless of contents of input data

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5597649A (en) * 1979-01-19 1980-07-25 Nec Corp Information processor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5597649A (en) * 1979-01-19 1980-07-25 Nec Corp Information processor

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61127043A (en) * 1984-11-26 1986-06-14 Hitachi Ltd Data processor
JPS61211746A (en) * 1985-03-18 1986-09-19 Fujitsu Ltd Program executing control system
JPS61248143A (en) * 1985-04-26 1986-11-05 Hitachi Ltd Lsi system connecting register in parallel and hierarchically
JPS6481046A (en) * 1987-09-22 1989-03-27 Nec Corp Microprocessor unit incorporating debugging device
JPH01142950A (en) * 1987-11-30 1989-06-05 Ricoh Co Ltd Processor integrated circuit device
US5872961A (en) * 1991-05-29 1999-02-16 Nec Corporation Microcomputer allowing external monitoring of internal resources
US7814358B2 (en) 2006-07-18 2010-10-12 Denso Corporation Electronic apparatus capable of outputting data in predetermined timing regardless of contents of input data

Also Published As

Publication number Publication date
JPH0159610B2 (en) 1989-12-19

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