JPS57201386A - Synchronizing signal regenerating circuit of character broadcast receiver - Google Patents

Synchronizing signal regenerating circuit of character broadcast receiver

Info

Publication number
JPS57201386A
JPS57201386A JP8506381A JP8506381A JPS57201386A JP S57201386 A JPS57201386 A JP S57201386A JP 8506381 A JP8506381 A JP 8506381A JP 8506381 A JP8506381 A JP 8506381A JP S57201386 A JPS57201386 A JP S57201386A
Authority
JP
Japan
Prior art keywords
circuit
oscillators
trailing
individual
quartz oscillators
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8506381A
Other languages
Japanese (ja)
Other versions
JPS625552B2 (en
Inventor
Kinya Takemura
Kazuhiro Fukuzaki
Naoki Nishida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP8506381A priority Critical patent/JPS57201386A/en
Publication of JPS57201386A publication Critical patent/JPS57201386A/en
Publication of JPS625552B2 publication Critical patent/JPS625552B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/025Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame
    • H04N7/035Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Systems (AREA)

Abstract

PURPOSE:To limit the oscillation time of individual quartz oscillators, to eliminate interference between regenerated clocks, and to prevent the occurrence of erroneous reception, by switching the oscillations of the individual quartz oscillators which correspond to horizontal scans on the basis of specific signals of individual multiplex character signals. CONSTITUTION:When a character multiplex signal is inputted from a terminal 1, a switching circuit 10 is connected to the trailing stage of a clock run-in CRI sampling circuit 2 and output terminals 1 and 2 of the circuit 10 are connected to quartz oscillators 21 and 22. The number of those quartz oscillators 21 and 22 corresponds to that of specific horizontal scanning lines in a vertical blanking period, and outputs of the oscillators 21 and 22 are connected in common and then connected to a trailing amplifying circuit 4. The control signal (f) of this circuit 10 is based upon a pulse signal (d) outputted when a one byte framing code trailing a CRI supplid to an input terminal 31 is read. Thus, interference between regenerated clocks regenerated by the oscillators 21 and 22 is eliminated to prevent the occurrence of erroneous reception.
JP8506381A 1981-06-03 1981-06-03 Synchronizing signal regenerating circuit of character broadcast receiver Granted JPS57201386A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8506381A JPS57201386A (en) 1981-06-03 1981-06-03 Synchronizing signal regenerating circuit of character broadcast receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8506381A JPS57201386A (en) 1981-06-03 1981-06-03 Synchronizing signal regenerating circuit of character broadcast receiver

Publications (2)

Publication Number Publication Date
JPS57201386A true JPS57201386A (en) 1982-12-09
JPS625552B2 JPS625552B2 (en) 1987-02-05

Family

ID=13848169

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8506381A Granted JPS57201386A (en) 1981-06-03 1981-06-03 Synchronizing signal regenerating circuit of character broadcast receiver

Country Status (1)

Country Link
JP (1) JPS57201386A (en)

Also Published As

Publication number Publication date
JPS625552B2 (en) 1987-02-05

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