JPS57199239A - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit deviceInfo
- Publication number
- JPS57199239A JPS57199239A JP56084770A JP8477081A JPS57199239A JP S57199239 A JPS57199239 A JP S57199239A JP 56084770 A JP56084770 A JP 56084770A JP 8477081 A JP8477081 A JP 8477081A JP S57199239 A JPS57199239 A JP S57199239A
- Authority
- JP
- Japan
- Prior art keywords
- pads
- integrated circuit
- semiconductor integrated
- circuit device
- function
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Abstract
PURPOSE:To avoid a crossing of wires when a function is changed by changing pairs of wire-bonded internal pads by providing a plurality of internal pads for the identical signal. CONSTITUTION:Functional blocks A, B, C and D and pads PA1, PA2, PB1, PC1, and PD1 are provided in a semiconductor integrated circuit chip 1. One function is obtained by connecting the pads PA1 and PC1 and the pads PB1 and PD1. Another function is obtained by connecting the pads PA2 and PD1 and the pads PB1 and PC1. Two pads (PA1, PA2) are provided for connecting to the functional block A, so that the crossing of wires is avoided even if the pair of internal pads connected each other is changed over.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56084770A JPS57199239A (en) | 1981-06-02 | 1981-06-02 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56084770A JPS57199239A (en) | 1981-06-02 | 1981-06-02 | Semiconductor integrated circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57199239A true JPS57199239A (en) | 1982-12-07 |
Family
ID=13839910
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56084770A Pending JPS57199239A (en) | 1981-06-02 | 1981-06-02 | Semiconductor integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57199239A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5364470A (en) * | 1976-11-19 | 1978-06-08 | Mitsubishi Electric Corp | Lead frame of semiconductor device |
JPS5492190A (en) * | 1977-12-29 | 1979-07-21 | Fujitsu Ltd | Integrated circuit |
-
1981
- 1981-06-02 JP JP56084770A patent/JPS57199239A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5364470A (en) * | 1976-11-19 | 1978-06-08 | Mitsubishi Electric Corp | Lead frame of semiconductor device |
JPS5492190A (en) * | 1977-12-29 | 1979-07-21 | Fujitsu Ltd | Integrated circuit |
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