JPS57197968A - System discriminating method for video signal - Google Patents

System discriminating method for video signal

Info

Publication number
JPS57197968A
JPS57197968A JP8358881A JP8358881A JPS57197968A JP S57197968 A JPS57197968 A JP S57197968A JP 8358881 A JP8358881 A JP 8358881A JP 8358881 A JP8358881 A JP 8358881A JP S57197968 A JPS57197968 A JP S57197968A
Authority
JP
Japan
Prior art keywords
signal
pulses
eia
equalized
video signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8358881A
Other languages
Japanese (ja)
Inventor
Ichitaro Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP8358881A priority Critical patent/JPS57197968A/en
Publication of JPS57197968A publication Critical patent/JPS57197968A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/46—Receiver circuitry for the reception of television signals according to analogue transmission standards for receiving on more than one standard at will

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)

Abstract

PURPOSE:To discriminate a video signal in the EIA system from that in CCIR system, by detecting the number of equalized pulses during the vertical synchronizing period of the video signal. CONSTITUTION:To an input terminal 7, a synchronizing signal SYNC of an EIA or CCIR system is inputted. A vertical synchronizing signal VD of the EIA system has width 3H and six equalized pulses are arranged; and a signal VD of the CCIR system has width 2.5H and five equalized pulses. When the signal inputted to the terminal 7 is of the EIA system, six sampling pulses are obtained through an integrating circuit 3 and a puse generator 4 and the transistor Q5 of a sample holding circuit 2 is turned on by the sampling pulses to output a staircase voltage proportioal to the number of the equalized pulses. Similarly, when the input signal is of the CCIR system, the voltage which corresponds the five equalized pulses is outputted, but the reference voltage V2 of a comparator 5 is set between the both, so that only when the input signal of the EIA system is supplied, an output signal is obtained.
JP8358881A 1981-05-30 1981-05-30 System discriminating method for video signal Pending JPS57197968A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8358881A JPS57197968A (en) 1981-05-30 1981-05-30 System discriminating method for video signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8358881A JPS57197968A (en) 1981-05-30 1981-05-30 System discriminating method for video signal

Publications (1)

Publication Number Publication Date
JPS57197968A true JPS57197968A (en) 1982-12-04

Family

ID=13806645

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8358881A Pending JPS57197968A (en) 1981-05-30 1981-05-30 System discriminating method for video signal

Country Status (1)

Country Link
JP (1) JPS57197968A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60167465U (en) * 1984-04-10 1985-11-07 シャープ株式会社 Vertical blanking pulse generation circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60167465U (en) * 1984-04-10 1985-11-07 シャープ株式会社 Vertical blanking pulse generation circuit
JPH048699Y2 (en) * 1984-04-10 1992-03-04

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