SU1259520A1 - Synchronizing signal discriminator - Google Patents

Abstract

The invention relates to television technology. The accuracy of the extraction of clock pulses (SI) from the signal is increased. The device contains a threshold unit (PB) 1, a selector 2 of personnel SI, a controlled voltage source (UIN) 3, a capacitor 4, and an integrator 5. The output voltage of the UIN is chosen equal to the constant component of the lowercase SI and the personnel SI having a different value, the output voltage UIN 3 is changed by the time it passes through the synchronic collector of personnel SI. The difference between the constant component of the SI and the output voltage of the UINZ causes a change in the output voltage of the integrator 5 t. Ex., That the level of limitation is constant. The device has noise immunity with respect to impulse noise. 1 Fig. S

Description

The invention relates to television technology and is intended for use as part of a receiving and measuring television arnia.

The purpose of the invention is to improve the accuracy in the separation of sync pulses from the video signal.

The drawing shows a structural electrical circuit of the sync selector.

The sync selector contains a threshold unit, a frame sync selector (SKSI) 2, a controlled voltage source 3 (UIN) 3, an adder A and an integrator 5.

The sync selector works as follows.

The video signal, which enters the input of the Threshold Block 1, is limited in it at a level approximately equal to the mid-range of the clock pulses. Of the Skei 2 sync pulses allocated by the threshold block I, frame sync pulses are made that control the output voltage of the CID 3, which is then combined in the adder 4 with the selected sync pulses arriving at its second input. The output signal of the adder 4 through the integrator 5 arrives at the second input of the threshold unit 1, setting the limit level of the latter.

& 1 the input voltage of the UIN 3 is chosen to be equal in magnitude to the constant component of the correctly selected sync pulses, but of opposite polarity. Since the constant component of the horizontal sync pulses and 40 HR sync pulses has a different meaning, the output voltage is 12595202

VIN 3 is changed by the time it takes to go through the NCSI,

Real sync pulses extracted from the video signal have a trapezic 5 ideal shape, i.e. when the level of the limitation changes within the scope of the clock pulses, the constant component of the output signal of the threshold unit 1 also changes. The difference

10 between the constant clock component and the output voltage 3 causes the output voltage of the integrator 5 to change so that the level of the limit always remains

15 constant.

The pre-sync selector has a high noise immunity to impulse noise, which only slightly changes the

The 20 level of limiting the threshold unit 1, in contrast to the sync selectors with level fixation at the semiconductor junction, which in this case is permanently blocked,

35

Claims (1)

Invention Formula A sync selector containing a threshold unit whose input is a video signal input, an output is the output of a sync selector, and the second input is connected to the integrator output, so that, in order to improve: the accuracy of the selection of clock pulses, A selector of each sync pulse has been entered into it, y efi I have a voltage source and an adder connected in series and between the output of the threshold unit and the integrator input, while the second input of the adder is connected to the output of the threshold unit. Editor M.Blanar Order 5141/59 Circulation 624 Subscription VNIGOSh of the USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, Projecto st., 4 Invention Formula A sync selector containing a threshold unit whose input is a video signal input, an output is the output of a sync selector, and the second input is connected to the integrator output, so that, in order to improve: the accuracy of the selection of clock pulses, A selector of each sync pulse has been entered into it, y efi I have a voltage source and an adder connected in series and between the output of the threshold unit and the integrator input, while the second input of the adder is connected to the output of the threshold unit. Compiled by L. Stasenko Tehred I.Popovich Proofreader A.T.