JPS56117483A - Discriminating circuit for receiving system - Google Patents

Discriminating circuit for receiving system

Info

Publication number
JPS56117483A
JPS56117483A JP2072980A JP2072980A JPS56117483A JP S56117483 A JPS56117483 A JP S56117483A JP 2072980 A JP2072980 A JP 2072980A JP 2072980 A JP2072980 A JP 2072980A JP S56117483 A JPS56117483 A JP S56117483A
Authority
JP
Japan
Prior art keywords
cycle
voltage
input
circuit
change
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2072980A
Other languages
Japanese (ja)
Inventor
Hiroyoshi Shimozaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2072980A priority Critical patent/JPS56117483A/en
Publication of JPS56117483A publication Critical patent/JPS56117483A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/64—Circuits for processing colour signals
    • H04N9/642—Multi-standard receivers

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Color Television Systems (AREA)

Abstract

PURPOSE:To ensure an automatic switching of reception between the NTSC system and the PAL system, by discriminating the difference of cycle of the vertical synchronous signal. CONSTITUTION:The output of the vertical synchronous signal separating circuit 1 is applied to the waveform producing circuit 2. The circuit 2 supplies the pulse voltage of 1/50Hz cycle in the case of the PAL system and the voltage of 1/60Hz cycle in the case of the NTSC system to the comparator 3 each. The comparator 3 has the frequency-voltage converting function that varies the output voltage following the change of cycle of the input signal. The control circuit 4 has an ON/OFF function in accordance with the change of level of the input voltage and then gives a switching control of the receiving system to each input between the NTSC system and the PAL system. Thus an automatic switching is made possible for the receiving system of a receiver to the change of the input system.
JP2072980A 1980-02-20 1980-02-20 Discriminating circuit for receiving system Pending JPS56117483A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2072980A JPS56117483A (en) 1980-02-20 1980-02-20 Discriminating circuit for receiving system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2072980A JPS56117483A (en) 1980-02-20 1980-02-20 Discriminating circuit for receiving system

Publications (1)

Publication Number Publication Date
JPS56117483A true JPS56117483A (en) 1981-09-14

Family

ID=12035264

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2072980A Pending JPS56117483A (en) 1980-02-20 1980-02-20 Discriminating circuit for receiving system

Country Status (1)

Country Link
JP (1) JPS56117483A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0536284U (en) * 1991-10-16 1993-05-18 シヤープ株式会社 Fridge rail fixture
KR100386600B1 (en) * 2001-07-05 2003-06-09 엘지전자 주식회사 Input mode auto decision method of monitor
US8035589B2 (en) 2005-03-15 2011-10-11 Sharp Kabushiki Kaisha Drive method of liquid crystal display device, driver of liquid crystal display device, program of method and storage medium thereof, and liquid crystal display device
US8253678B2 (en) * 2005-03-15 2012-08-28 Sharp Kabushiki Kaisha Drive unit and display device for setting a subframe period

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0536284U (en) * 1991-10-16 1993-05-18 シヤープ株式会社 Fridge rail fixture
KR100386600B1 (en) * 2001-07-05 2003-06-09 엘지전자 주식회사 Input mode auto decision method of monitor
US8035589B2 (en) 2005-03-15 2011-10-11 Sharp Kabushiki Kaisha Drive method of liquid crystal display device, driver of liquid crystal display device, program of method and storage medium thereof, and liquid crystal display device
US8253678B2 (en) * 2005-03-15 2012-08-28 Sharp Kabushiki Kaisha Drive unit and display device for setting a subframe period

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