SU1099402A1 - Device for forming clock synchronizing signal - Google Patents

Abstract

A DEVICE FOR THE FORMATION OF A CLOCK SYNCHRESIGNAL, containing a series-connected non-linear converter and a time SliMJirt i iV:.; A lecturer, as well as a phase demodulator and a clock clock driver, characterized in that, in order to improve the accuracy of clock clock generation under the influence of interferences and interruptions of communication, a delay line and a trigger are inputted to the inputs of which are connected to the time selector outputs, the second and third inputs of which are connected respectively to the second and third outputs of the nonlinear converter, the input of which is combined with the input of the delay line and is the input of the device; rzhki connected to the first input of the phase demodulator (A to the second input of which is connected the output flip-flop, and the output of the phase demodulator podroedinen to the input of the clock timing.

Description

The invention relates to a technique for transmitting discrete information and can be used in apparatus for receiving and processing a bioimpulse phaeoamplified signal. A shaper of the reference frequency of a biopulse phase-manipulated signal is known, containing the main subtraction element, the first and second outputs of which are respectively connected to the input and output of the delay line, the rectifier, the additional subtractor, the additional delay line, the additional rectifier, the OR element, and the standby multivibrator , the outputs of the miter and the additional rectifier are connected to the first inputs of the main and additional subtraction elements, the outputs of which are connected to the element I through the input of the waiting multivator, while the inputs of the rectifier are combined, and the input and output of the additional delay line are connected to the first and second inputs of the additional subtraction element, respectively. Due to the absence of narrow-band frequency-selective elements, it has an extended frequency range of 1 3. But there are no means preventing it from being able to switch to reverse operation mode. The closest technical solution to the invention is an arrangement for generating a clock signal, comprising a serially connected nonlinear converter, and a time selector, as well as a phase demodulator and a clock synchronization driver, and a linear filter is connected to the device input, the output of which is connected to the input of the nonlinear converter, the second output of which is connected to the first input of the phase demodulator through the clock signal generator with phase definition, the second input D which is combined with the first input of the time selection control unit and connected to the output of the clock clock generator, to the input of which the output of the time selector is connected, to the second input of which the output of the phase demodulator is connected through the C 2 3 temporal selection control unit. clock sync signal is that the rapid automatic elimination of the mode of reverse operation in it is possible only with short interruptions of the input signal. Upon the occurrence of long interruptions of the input signal in the output voltage of a nonlinear converter of a regular pulse sequence located in the middle of clock intervals, the phase demodulator generates a control signal that prevents the pulse selector corresponding to the limits of the clock intervals from passing and the reverse work. The inverse operation is maintained as long as the output voltage of the nonlinear converter contains a regular sequence of pulses lying in the middle of the clock intervals. False synchronization is eliminated only with such a change in the code pattern of the input bi-pulse sequence, in which the limits of the clock intervals correspond to a fairly regular sequence of output pulses of the nonlinear converter and provided that this situation lasts for a time interval sufficient for the sync-signal generator with a phase definition corresponding to discrete line spectrum of the converted signal. Consequently, when there are not enough short interruptions in communication, the reliably guaranteed elimination of the reverse operation mode takes place with a large delay, which leads to a distortion of a significant amount of received information. The purpose of the invention is to improve the accuracy of the formation of a clock sync signal when exposed to interference and interruptions in communication. The goal is achieved by the fact that a delay line and a trigger, to which the corresponding inputs are connected, are inserted into a clock sync signal generating device containing a series-connected nonlinear converter and a time selector, as well as a phase demodulator and a clock sync driver.

the outputs of the time selector, to the second and third input of which the second and third outputs of the nonlinear converter are connected, the input of which is combined with the input of the delay line and is the device input, the output of the delay line is connected to the first input of the phase demodulator, to the second input of which the trigger output is connected and the output of the phase demodulator is connected to the input of the clock sync signal generator.

Fig. 1 shows a structural electric circuit of the device for generating a clock sync signal in Fig. 2 — time diagrams of the signals.

A device for generating a clock sync signal contains a non-linear converter 1, a time slice selector 2, a phase demodulator 3, a clock sync driver 4 and a delay line 5 and a trigger 6.

Nonlinear transducer 1 contains a zero-crossing signal detector 7, half-wavelength detectors 8 and 9, and an OR 10 element.

The time selector 2 contains pending multivibrators 11 and 12, elements And 13 and 14.

A device for generating a clock sync signal operates as follows.

The input bi-pulse phase-manipulated signal (Fig.2o) is fed to the input of the nonlinear converter 1. The detector 7 generates pulses, the temporary position of which corresponds to the moments of transitions of the input signal (Fig.20) through a zero value. After straightening into one half-period rectifiers 8 and 9, the pulses (Fig.) Go to the inputs of the element OR 10, as well as to the corresponding inputs of the elements And 13 and 14, which are part of the time selector 2, the Time selector 2 in the example given A specific design is a variation of a slotted filter that responds to instantaneous changes in the phase and frequency of the input signal. The output sequence of the pulses of the element OR 10 arrives at the input of the multi-vibrator 11, represented by a combination of sequences (FIG. 25, c) of the output pulses of the full-wave plugs

8 and 9. The waiting multivibrator 11 is on the leading edge. Each of the input pulses generates a delay pulse of duration approximately

-g clock interval T. The waiting multivibrator 12 on the rear edges of the output pulses of the waiting multivibrator 11 generates a prohibition pulse (Fig. 21). The inhibit pulses (FIG. 2d) arrive at the inputs of elements I 13 and 14 and prohibit the passage to the output of the time selector 2 of the sequence pulses (FIG. 26 and c), which follow with a period T. Those sequence pulses (FIG. 25) that correspond to The midpoints of the clock intervals of the input signal (Fig. 2a), immediately following the phase manipulation moments, are not prohibited in the And 13 and 14 elements, passing to the outputs of the time selector 2, forming a sequence of pulses (Fig. 2, 3). The pulses (Fig. 2E) correspond to the moments of polarity change of the input bi-pulse signal (Fig. 2o |) negative to a positive value. They arrive at the first input of trigger 6. The pulses (Fig. 2e) correspond to moments of opposite polarity of the signal (Fig.) And arrive at the second input of trigger 6. The trigger 6 with separate inputs is switched by each of the pulses (Fig. 2 and or e) and its output signal (Fig. 2 h) switches the transmission coefficient of the phase demodulator 3 in such a way that in one state of the trigger 6 the transmission coefficient of the phase demodulator 3 is -1, and in the other +1. On in: The second input of the phase demodulator 3 receives a signal (Fig. 2g), which is an input bi-pulse signal (Fig. 2o (), delayed by a delay line 5 by half the period T / 2. Phase demodulator 3 removes the phase shift of the signal (Fig. 2g) and generates a signal (Fig. 2i) that satisfies the frequency and phase requirements of the clock signal. The driver, 4, converts it into a clock signal (Fig. 2) of the required shape.

Each of the points of transition in the received information binary sequence from O to 1 or from 1 to O is accompanied by the manipulation of the phase of the input bi-pulse signal.

Claims (1)

DEVICE FOR FORMING A TACT SYNC SIGNAL, comprising a nonlinear converter and a time selector connected in series, as well as a phase demodulator and a clock synchronizer, characterized in that, in order to increase the accuracy of the clock synchronization when exposed to noise and communication interruptions, a delay line is introduced into it and a trigger, to the inputs of which the corresponding outputs of the temporary selector are connected, to the second and third inputs of which the second and third the outputs of a nonlinear converter, the input of which is combined with the input of the delay line and is the input of the device, the output of the delay line is connected to the $ 8 first input of the phase demodulator, the trigger output is connected to the second input, and the output of the phase demodulator is connected to the input of the clock generator. SU „„ 1099402 1 . 1099402