JPS57147351A - Timing extractor - Google Patents

Abstract

PURPOSE:To emphasize a timing component by passing a multilevel signal (period; T) through a monostable circuit which outputs a pulse with pulse width tau (tau<T). CONSTITUTION:When an input signal Si crosses V0 successively to V1, the output (h) of a comparing circuit 25 is as shown by (A), the output (d) of an FF circuit 25 by (B), the output (b) of an FF circuit 23 by (C), the output (d) of the FF circuit 25 by (D), and the output (e) of a monostable circuit 26 by (E), thereby outputting a pulse with pulse width tau. When an input signal S1 crosses the V0 successively to V2, the output (h) of the comparing circuit 22 is as shown by (F), the output (d) of the FF circuit 25 by (G), and the output (c) of the FF circuit 23 by (H); and the FF circuit 25 is reset to generate its output (d) as shown by (I). Then, the monostable circuit 26 generates the output (e) of a pulse with the pulse width tau as shown by (J). Further, the monostable circuit 26 disregards the output (h) of the comparing circuit 22 at a P1, so a timing component is emphasized. The output of the monostable circuit 26 is applied to a phase synchronizing circuit 28 through a tuning circuit 27.