JPS57196363A - Automatic switching device of single chip microcomputer mode - Google Patents
Automatic switching device of single chip microcomputer modeInfo
- Publication number
- JPS57196363A JPS57196363A JP56079190A JP7919081A JPS57196363A JP S57196363 A JPS57196363 A JP S57196363A JP 56079190 A JP56079190 A JP 56079190A JP 7919081 A JP7919081 A JP 7919081A JP S57196363 A JPS57196363 A JP S57196363A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- outside
- address signal
- inputted
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7839—Architectures of general purpose stored program computers comprising a single central processing unit with memory
- G06F15/7864—Architectures of general purpose stored program computers comprising a single central processing unit with memory on more than one IC chip
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microcomputers (AREA)
Abstract
PURPOSE:To effectively use a computer, by decoding an address signal in its inside, detecting whether this signal is an address signal of an inside memory or an outside memory, and automatically sending out the address signal to the outside only in case of an address of the outside memory. CONSTITUTION:When an address signal is inputted to a decoder 2 and a low potential signal is inputted to AND circuits 8 and 4, an AND condition of the circuit 8 is not formed but an AND condition of the circuit 4 is formed. Accordingly, the circuit 4 sends out the address signal to a memory 9 through an OR circuit 6 and a buffer 7. Also, when a signal of high potential is inputted to the circuits 8 and 4, the AND condition of the circuit is formed, and it is detected that the I/O port can be used. As a result, an I/O port output signal A is outputted to the outside through the circuit 6 and the buffer 7, or from the outside, an I/O port input data signal Ain is inputted through the buffer 8, and the address signal is used as I/O.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56079190A JPS57196363A (en) | 1981-05-27 | 1981-05-27 | Automatic switching device of single chip microcomputer mode |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56079190A JPS57196363A (en) | 1981-05-27 | 1981-05-27 | Automatic switching device of single chip microcomputer mode |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57196363A true JPS57196363A (en) | 1982-12-02 |
JPH0213345B2 JPH0213345B2 (en) | 1990-04-04 |
Family
ID=13683051
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56079190A Granted JPS57196363A (en) | 1981-05-27 | 1981-05-27 | Automatic switching device of single chip microcomputer mode |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57196363A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5268341A (en) * | 1975-12-01 | 1977-06-07 | Intel Corp | Mos digital computer |
-
1981
- 1981-05-27 JP JP56079190A patent/JPS57196363A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5268341A (en) * | 1975-12-01 | 1977-06-07 | Intel Corp | Mos digital computer |
Also Published As
Publication number | Publication date |
---|---|
JPH0213345B2 (en) | 1990-04-04 |
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