JPS57191727A - Clock pulse phase adjusting circuit - Google Patents

Clock pulse phase adjusting circuit

Info

Publication number
JPS57191727A
JPS57191727A JP56076983A JP7698381A JPS57191727A JP S57191727 A JPS57191727 A JP S57191727A JP 56076983 A JP56076983 A JP 56076983A JP 7698381 A JP7698381 A JP 7698381A JP S57191727 A JPS57191727 A JP S57191727A
Authority
JP
Japan
Prior art keywords
phase
clock pulse
clock
adjusted
adjusting circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56076983A
Other languages
English (en)
Other versions
JPS6311689B2 (ja
Inventor
Takeo Koizumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56076983A priority Critical patent/JPS57191727A/ja
Publication of JPS57191727A publication Critical patent/JPS57191727A/ja
Publication of JPS6311689B2 publication Critical patent/JPS6311689B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP56076983A 1981-05-21 1981-05-21 Clock pulse phase adjusting circuit Granted JPS57191727A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56076983A JPS57191727A (en) 1981-05-21 1981-05-21 Clock pulse phase adjusting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56076983A JPS57191727A (en) 1981-05-21 1981-05-21 Clock pulse phase adjusting circuit

Publications (2)

Publication Number Publication Date
JPS57191727A true JPS57191727A (en) 1982-11-25
JPS6311689B2 JPS6311689B2 (ja) 1988-03-15

Family

ID=13621007

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56076983A Granted JPS57191727A (en) 1981-05-21 1981-05-21 Clock pulse phase adjusting circuit

Country Status (1)

Country Link
JP (1) JPS57191727A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02205909A (ja) * 1989-02-03 1990-08-15 Nec Corp クロック分配装置
JPH0438508A (ja) * 1990-06-04 1992-02-07 Nec Corp クロック供給装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4925060A (ja) * 1972-04-30 1974-03-06
JPS4960448A (ja) * 1972-10-11 1974-06-12

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4925060A (ja) * 1972-04-30 1974-03-06
JPS4960448A (ja) * 1972-10-11 1974-06-12

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02205909A (ja) * 1989-02-03 1990-08-15 Nec Corp クロック分配装置
JPH0438508A (ja) * 1990-06-04 1992-02-07 Nec Corp クロック供給装置

Also Published As

Publication number Publication date
JPS6311689B2 (ja) 1988-03-15

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