JPS57189075A - Testing device for semiconductor integrated circuit - Google Patents

Testing device for semiconductor integrated circuit

Info

Publication number
JPS57189075A
JPS57189075A JP56073384A JP7338481A JPS57189075A JP S57189075 A JPS57189075 A JP S57189075A JP 56073384 A JP56073384 A JP 56073384A JP 7338481 A JP7338481 A JP 7338481A JP S57189075 A JPS57189075 A JP S57189075A
Authority
JP
Japan
Prior art keywords
voltage
dut
electrodes
semiconductor integrated
reference voltages
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56073384A
Other languages
English (en)
Inventor
Toshiharu Ishida
Toru Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56073384A priority Critical patent/JPS57189075A/ja
Publication of JPS57189075A publication Critical patent/JPS57189075A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/316—Testing of analog circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
JP56073384A 1981-05-18 1981-05-18 Testing device for semiconductor integrated circuit Pending JPS57189075A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56073384A JPS57189075A (en) 1981-05-18 1981-05-18 Testing device for semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56073384A JPS57189075A (en) 1981-05-18 1981-05-18 Testing device for semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS57189075A true JPS57189075A (en) 1982-11-20

Family

ID=13516636

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56073384A Pending JPS57189075A (en) 1981-05-18 1981-05-18 Testing device for semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS57189075A (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01129176A (ja) * 1987-11-13 1989-05-22 Matsushita Electric Ind Co Ltd デバイス試験装置
JPH06114126A (ja) * 1992-10-07 1994-04-26 Endo Seisakusho:Kk ゴルフクラブヘッド
JPH0759880A (ja) * 1993-08-05 1995-03-07 Y T Lee Alexander ゴルフクラブの製造方法
US5570012A (en) * 1994-11-08 1996-10-29 Rohm Co. Ltd. Apparatus for testing a semiconductor device by comparison with an identical reference device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01129176A (ja) * 1987-11-13 1989-05-22 Matsushita Electric Ind Co Ltd デバイス試験装置
JPH06114126A (ja) * 1992-10-07 1994-04-26 Endo Seisakusho:Kk ゴルフクラブヘッド
JPH0759880A (ja) * 1993-08-05 1995-03-07 Y T Lee Alexander ゴルフクラブの製造方法
US5570012A (en) * 1994-11-08 1996-10-29 Rohm Co. Ltd. Apparatus for testing a semiconductor device by comparison with an identical reference device

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