JPS57182256A - Storage system for data to external storage device - Google Patents

Storage system for data to external storage device

Info

Publication number
JPS57182256A
JPS57182256A JP56067528A JP6752881A JPS57182256A JP S57182256 A JPS57182256 A JP S57182256A JP 56067528 A JP56067528 A JP 56067528A JP 6752881 A JP6752881 A JP 6752881A JP S57182256 A JPS57182256 A JP S57182256A
Authority
JP
Japan
Prior art keywords
data
storage
buffer registers
registers
buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56067528A
Other languages
Japanese (ja)
Inventor
Takeo Iketani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Tateisi Electronics Co
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tateisi Electronics Co, Omron Tateisi Electronics Co filed Critical Tateisi Electronics Co
Priority to JP56067528A priority Critical patent/JPS57182256A/en
Publication of JPS57182256A publication Critical patent/JPS57182256A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer And Data Communications (AREA)

Abstract

PURPOSE:To manage with less buffer registers even when there are many kinds of data by storing one kind of data in one buffer register temporarily, and then clearing a storage area which corresponds to a table storage part while transferring data to an external storage part when all registers are full. CONSTITUTION:Data which can be classified by kinds are sent from a terminal equipment 1 to a central processor 2. Buffer registers B1-Bn are provided with corresponding table storage parts (not shown in the figure), and while those storage parts are referred to, the buffer registers are each stored with one kind of data temporarily; when the buffer registers B1-Bn are full of the stored data, the storage contents are transferred to external storage devices F1-Fn. Simultaneously, the storage areas of the table storage part which correspond to the buffer registers are cleared.
JP56067528A 1981-05-02 1981-05-02 Storage system for data to external storage device Pending JPS57182256A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56067528A JPS57182256A (en) 1981-05-02 1981-05-02 Storage system for data to external storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56067528A JPS57182256A (en) 1981-05-02 1981-05-02 Storage system for data to external storage device

Publications (1)

Publication Number Publication Date
JPS57182256A true JPS57182256A (en) 1982-11-10

Family

ID=13347563

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56067528A Pending JPS57182256A (en) 1981-05-02 1981-05-02 Storage system for data to external storage device

Country Status (1)

Country Link
JP (1) JPS57182256A (en)

Similar Documents

Publication Publication Date Title
DE3566766D1 (en) Circuit arrangement for telecommunication exchanges, in particular for telephone exchanges, with information processing networks and traffic measuring devices
JPS5319728A (en) Data treansfer processing system
JPS57182256A (en) Storage system for data to external storage device
JPS56110161A (en) Message processing system
JPS57131149A (en) Storage type data transfer system
JPS5533214A (en) Information processing system
JPS5699530A (en) Information transfer system
JPS5489434A (en) Memory access control processing system
JPS6473458A (en) System for controlling access of vector data
JPS57136239A (en) Device address switching system
JPS54109342A (en) Data processor
JPS56157518A (en) Communication device between processing devices
JPS5435653A (en) Information transfer system
JPS57203278A (en) Controlling method for hierarchical buffer
JPS6426936A (en) Data processor
JPS5783836A (en) Check system for data transferring error
JPS57111886A (en) Buffer memory controller having test function
JPS5463640A (en) Information processing system
JPS5792475A (en) Multiple stack device
JPS564826A (en) Electronic computer
JPS52125240A (en) Data arrangement control system
JPS5760434A (en) Data transfer controlling system
JPS56110123A (en) Reconciliation device for utilization of common thing
JPS53103332A (en) Input/output control system for information processor
JPS5696315A (en) Data transfer control device