JPS57179981A - Rom control system - Google Patents

Rom control system

Info

Publication number
JPS57179981A
JPS57179981A JP6248381A JP6248381A JPS57179981A JP S57179981 A JPS57179981 A JP S57179981A JP 6248381 A JP6248381 A JP 6248381A JP 6248381 A JP6248381 A JP 6248381A JP S57179981 A JPS57179981 A JP S57179981A
Authority
JP
Japan
Prior art keywords
data
rom
read out
cpu
start address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6248381A
Other languages
Japanese (ja)
Inventor
Hiroyasu Nomiya
Hitoyoshi Shudo
Hideo Hara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6248381A priority Critical patent/JPS57179981A/en
Publication of JPS57179981A publication Critical patent/JPS57179981A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)

Abstract

PURPOSE:To relieve the burden in a CPU remarkably, by enabling to read out all the required data by only transmitting a readout start address from the CPU, in reading out consecutive block data from an ROM. CONSTITUTION:During the period when consecutive data are read out from an ROM 3 via an output line 8, the data from the ROM 3 is monitored with an end mark detection section 14. When the same signal as the output signal of an end mark storage section is read out on the output line 8, a data end signal is transmitted from the detection section 14 to a microcomputer (MC)9. Thus, the MC9 can detect the read end of required data. A control section can only transmit the start address and can operate other processings exclusively.
JP6248381A 1981-04-27 1981-04-27 Rom control system Pending JPS57179981A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6248381A JPS57179981A (en) 1981-04-27 1981-04-27 Rom control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6248381A JPS57179981A (en) 1981-04-27 1981-04-27 Rom control system

Publications (1)

Publication Number Publication Date
JPS57179981A true JPS57179981A (en) 1982-11-05

Family

ID=13201465

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6248381A Pending JPS57179981A (en) 1981-04-27 1981-04-27 Rom control system

Country Status (1)

Country Link
JP (1) JPS57179981A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0397198A (en) * 1989-09-11 1991-04-23 Matsushita Electron Corp Semiconductor integrated circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57103177A (en) * 1980-12-19 1982-06-26 Fujitsu Ltd Read-only memory
JPS57164481A (en) * 1981-04-02 1982-10-09 Nec Corp Storage device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57103177A (en) * 1980-12-19 1982-06-26 Fujitsu Ltd Read-only memory
JPS57164481A (en) * 1981-04-02 1982-10-09 Nec Corp Storage device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0397198A (en) * 1989-09-11 1991-04-23 Matsushita Electron Corp Semiconductor integrated circuit

Similar Documents

Publication Publication Date Title
JPS57189231A (en) Data transferring system
KR830008232A (en) Communication Multiplexer with Variable Priority Scheme Using ROM
JPS5463634A (en) Bus controller
JPS5336430A (en) Character print system for program calculator
JPS57179981A (en) Rom control system
JPS57152066A (en) Opu communication system in multi-opu system
JPS5477040A (en) Data transmitter
JPS5621443A (en) Transmission unit
JPS52149042A (en) Power throw-in detection system for terminal
JPS5578363A (en) Memory area set system
JPS57179980A (en) Rom control system
JPS5380144A (en) Data transmission control system
JPS5578333A (en) Data transmission and receiving control system
JPS57204404A (en) Angle detecting device
JPS52132649A (en) Bus anomaly detecting circuit
JPS5676826A (en) Data transfer control system
JPS5547547A (en) Control device
JPS54146532A (en) Memory device
JPS5582331A (en) Process data transmission unit
JPS5714931A (en) Interruption controlling system
JPS5793457A (en) Microprogram controller
JPS57137917A (en) Error information transfer system
JPS5617422A (en) Interruption control system of information processor
JPS52116117A (en) Memory system
JPS5477541A (en) Information signal checking device for computer