JPS57176591A - Memory refresh control system - Google Patents

Memory refresh control system

Info

Publication number
JPS57176591A
JPS57176591A JP56060350A JP6035081A JPS57176591A JP S57176591 A JPS57176591 A JP S57176591A JP 56060350 A JP56060350 A JP 56060350A JP 6035081 A JP6035081 A JP 6035081A JP S57176591 A JPS57176591 A JP S57176591A
Authority
JP
Japan
Prior art keywords
address
circuit
request
signal
refresh
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56060350A
Other languages
Japanese (ja)
Inventor
Masahiro Baba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP56060350A priority Critical patent/JPS57176591A/en
Publication of JPS57176591A publication Critical patent/JPS57176591A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)

Abstract

PURPOSE:To improve the usage efficiency of a memory, by neglecting a refresh request to an address, when the access request is given to the address corresponding to the refresh address in the vicinity. CONSTITUTION:When an access request 13 from a CPU is received at a competition processing circuit 2, the circuit 2 gives an access request signal 13' to an address collation circuit 3. On the other hand, the next RF address 15 is formed at an RF address forming circuit 4 with a refresh (RF) address and the address 15 is given to the circuit 3. The circuit 3 collates an access address information 14 with information 15, and detects when accessing is made to an address corresponding to the next RF address, generates a refresh request cancelling signal 16 and gives it to a competition processing circuit 6. On the other hand, the request 13 is received at a circuit 6 for execution of accessing. Next, when an RF request 12 is received at the circuit 2, an RF request signal 12' is given to the circuit 6. When the signal 16 is inputted, the signal 12' is neglected and the reception of the request 13 is made possible.
JP56060350A 1981-04-20 1981-04-20 Memory refresh control system Pending JPS57176591A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56060350A JPS57176591A (en) 1981-04-20 1981-04-20 Memory refresh control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56060350A JPS57176591A (en) 1981-04-20 1981-04-20 Memory refresh control system

Publications (1)

Publication Number Publication Date
JPS57176591A true JPS57176591A (en) 1982-10-29

Family

ID=13139616

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56060350A Pending JPS57176591A (en) 1981-04-20 1981-04-20 Memory refresh control system

Country Status (1)

Country Link
JP (1) JPS57176591A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0453085A (en) * 1990-06-19 1992-02-20 Sharp Corp Dynamic memory controller

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0453085A (en) * 1990-06-19 1992-02-20 Sharp Corp Dynamic memory controller

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