JPS5448135A - Interruption process system - Google Patents

Interruption process system

Info

Publication number
JPS5448135A
JPS5448135A JP11456577A JP11456577A JPS5448135A JP S5448135 A JPS5448135 A JP S5448135A JP 11456577 A JP11456577 A JP 11456577A JP 11456577 A JP11456577 A JP 11456577A JP S5448135 A JPS5448135 A JP S5448135A
Authority
JP
Japan
Prior art keywords
interruption
register
circuit
process system
scan
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11456577A
Other languages
Japanese (ja)
Other versions
JPS6124731B2 (en
Inventor
Hideaki Iemura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11456577A priority Critical patent/JPS5448135A/en
Publication of JPS5448135A publication Critical patent/JPS5448135A/en
Publication of JPS6124731B2 publication Critical patent/JPS6124731B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To enhance the process capacity for the interruption process system applied in case the interruptions of the same level occur continuously, by using the number of the interruption waiting with the same interruption level at the reception time of an interruption as part of the interruption information.
CONSTITUTION: The process system comprises the following component units: scanning counter 1 to scan the communication circuit; interruption register memory 2 which contains the memory region corresponding to the circuit and registers "1" into the memory region designated by counter 1 when the data transfer process interruption conditions occur for a certain circuit and when the scan of the corresponding circuit comes round; address register part 31 where each register stores the circuit address waiting for the interruption; interruption wait register group 3 which possesses flag register part 32 to indicate the contents of part 31 is effective or not; interruption register 4; interruption register control circuit 5; interruption factor register 6; interruption priority circuit 7; and program process part 8 respectively
COPYRIGHT: (C)1979,JPO&Japio
JP11456577A 1977-09-26 1977-09-26 Interruption process system Granted JPS5448135A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11456577A JPS5448135A (en) 1977-09-26 1977-09-26 Interruption process system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11456577A JPS5448135A (en) 1977-09-26 1977-09-26 Interruption process system

Publications (2)

Publication Number Publication Date
JPS5448135A true JPS5448135A (en) 1979-04-16
JPS6124731B2 JPS6124731B2 (en) 1986-06-12

Family

ID=14640988

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11456577A Granted JPS5448135A (en) 1977-09-26 1977-09-26 Interruption process system

Country Status (1)

Country Link
JP (1) JPS5448135A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4928209A (en) * 1972-07-11 1974-03-13

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4928209A (en) * 1972-07-11 1974-03-13

Also Published As

Publication number Publication date
JPS6124731B2 (en) 1986-06-12

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