JPS57169253A - Circuit substrate - Google Patents

Circuit substrate

Info

Publication number
JPS57169253A
JPS57169253A JP56053633A JP5363381A JPS57169253A JP S57169253 A JPS57169253 A JP S57169253A JP 56053633 A JP56053633 A JP 56053633A JP 5363381 A JP5363381 A JP 5363381A JP S57169253 A JPS57169253 A JP S57169253A
Authority
JP
Japan
Prior art keywords
silver
sections
fringe
layers
coated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56053633A
Other languages
Japanese (ja)
Inventor
Shigehiro Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
YAMADA MEKKI KOGYOSHO KK
YAMADA METSUKI KOGYOSHO KK
Original Assignee
YAMADA MEKKI KOGYOSHO KK
YAMADA METSUKI KOGYOSHO KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by YAMADA MEKKI KOGYOSHO KK, YAMADA METSUKI KOGYOSHO KK filed Critical YAMADA MEKKI KOGYOSHO KK
Priority to JP56053633A priority Critical patent/JPS57169253A/en
Publication of JPS57169253A publication Critical patent/JPS57169253A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01028—Nickel [Ni]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PURPOSE:To prevent a short circuit due to the translation phenomenon of silver by forming a silver layer functioning as a bonding pad so that the fringe section of the silver layer is positioned at the inside only by a predetermined distance from the fringe section of the terminal section of a conductive passage shaped to the surface of a substrate when the terminal section is coated with the silver layer. CONSTITUTION:Circuit patterns 2 consisting of copper layers are formed onto the circuit substrate 1, and the surfaces of the patterns 2 are plated with nickel as necessary and coated with nickel layers 3. The terminal sections 4a, 4b of the circuit patterns 2 are coated with the silver layers 5 with approximately 2mu thickness so that the fringe sections are positioned at the inside only by 0.1mm.- 0.15mm. or longer from the fringe sections of the terminal sections 4a, 4b. A semiconductor element 7 is loaded onto the silver layer 5, or a bonding wire 8 is connected. Accordingly, the generation of an electric short circuit condition between conductors on the circuit substrate 1 due to the translation phenomenon of silver can be prevented because there is the sections to be attached 6 of the silver layers 5.
JP56053633A 1981-04-09 1981-04-09 Circuit substrate Pending JPS57169253A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56053633A JPS57169253A (en) 1981-04-09 1981-04-09 Circuit substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56053633A JPS57169253A (en) 1981-04-09 1981-04-09 Circuit substrate

Publications (1)

Publication Number Publication Date
JPS57169253A true JPS57169253A (en) 1982-10-18

Family

ID=12948299

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56053633A Pending JPS57169253A (en) 1981-04-09 1981-04-09 Circuit substrate

Country Status (1)

Country Link
JP (1) JPS57169253A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0686339U (en) * 1993-05-28 1994-12-13 日本無線株式会社 Hybrid integrated circuit board

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5232577A (en) * 1975-09-05 1977-03-11 Matsushita Electric Ind Co Ltd Printed circuit board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5232577A (en) * 1975-09-05 1977-03-11 Matsushita Electric Ind Co Ltd Printed circuit board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0686339U (en) * 1993-05-28 1994-12-13 日本無線株式会社 Hybrid integrated circuit board

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