JPS57166789A - Digital signal receiver - Google Patents
Digital signal receiverInfo
- Publication number
- JPS57166789A JPS57166789A JP56052591A JP5259181A JPS57166789A JP S57166789 A JPS57166789 A JP S57166789A JP 56052591 A JP56052591 A JP 56052591A JP 5259181 A JP5259181 A JP 5259181A JP S57166789 A JPS57166789 A JP S57166789A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- frc
- clock
- sampling clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/025—Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame
- H04N7/035—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal
- H04N7/0357—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal for error detection or correction
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Television Systems (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Communication Control (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
PURPOSE:To ensure the accurate sampleing of the data, by deciding the presence or absence of the detected pulse of a framing code signal and then switching the phase of the sampling clock. CONSTITUTION:A clock producing circuit 4 obtans the clock un-in CRIsignal and produces a sampling clock. At the same time, a framing code FRC signal detecting and timing pulse producing circuit 5 detects the FRC signal in the output signal of the circuit 3 and produces a timing pulse of the data signal. Then a sampling clock phase shift circuit 10 consisting of an LC filter is set among the circuits 4 and 5 plus a series-parallel converting circuit 6. The circuit 10 is selectively connected and disconnected by a relay 11. At the same time, the presence or absence of the FRC detecting pulse given from the circuit 5 is decided by a deciding circuit 12 to switch the relay 11.
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56052591A JPS57166789A (en) | 1981-04-07 | 1981-04-07 | Digital signal receiver |
CA000394291A CA1177138A (en) | 1981-01-20 | 1982-01-15 | Digital signal receiver |
AU79594/82A AU554973B2 (en) | 1981-01-20 | 1982-01-18 | Digital receiver error detection |
DE8282100350T DE3266081D1 (en) | 1981-01-20 | 1982-01-19 | Digital signal receiver |
EP19820100350 EP0056649B1 (en) | 1981-01-20 | 1982-01-19 | Digital signal receiver |
US06/340,829 US4461002A (en) | 1981-04-07 | 1982-01-19 | Digital signal receiver |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56052591A JPS57166789A (en) | 1981-04-07 | 1981-04-07 | Digital signal receiver |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57166789A true JPS57166789A (en) | 1982-10-14 |
JPS6243634B2 JPS6243634B2 (en) | 1987-09-16 |
Family
ID=12919023
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56052591A Granted JPS57166789A (en) | 1981-01-20 | 1981-04-07 | Digital signal receiver |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57166789A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5992412U (en) * | 1982-12-10 | 1984-06-22 | 日本放送協会 | Digital signal regenerator |
-
1981
- 1981-04-07 JP JP56052591A patent/JPS57166789A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5992412U (en) * | 1982-12-10 | 1984-06-22 | 日本放送協会 | Digital signal regenerator |
Also Published As
Publication number | Publication date |
---|---|
JPS6243634B2 (en) | 1987-09-16 |
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