JPS57164362A - Debugging device in multi-processor system - Google Patents

Debugging device in multi-processor system

Info

Publication number
JPS57164362A
JPS57164362A JP56050372A JP5037281A JPS57164362A JP S57164362 A JPS57164362 A JP S57164362A JP 56050372 A JP56050372 A JP 56050372A JP 5037281 A JP5037281 A JP 5037281A JP S57164362 A JPS57164362 A JP S57164362A
Authority
JP
Japan
Prior art keywords
processors
program
processor
control circuit
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56050372A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6239792B2 (enrdf_load_stackoverflow
Inventor
Kenichi Ueda
Atsushi Sugano
Kunio Honda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP56050372A priority Critical patent/JPS57164362A/ja
Publication of JPS57164362A publication Critical patent/JPS57164362A/ja
Publication of JPS6239792B2 publication Critical patent/JPS6239792B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Prevention of errors by analysis, debugging or testing of software

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Multi Processors (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
JP56050372A 1981-04-02 1981-04-02 Debugging device in multi-processor system Granted JPS57164362A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56050372A JPS57164362A (en) 1981-04-02 1981-04-02 Debugging device in multi-processor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56050372A JPS57164362A (en) 1981-04-02 1981-04-02 Debugging device in multi-processor system

Publications (2)

Publication Number Publication Date
JPS57164362A true JPS57164362A (en) 1982-10-08
JPS6239792B2 JPS6239792B2 (enrdf_load_stackoverflow) 1987-08-25

Family

ID=12857050

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56050372A Granted JPS57164362A (en) 1981-04-02 1981-04-02 Debugging device in multi-processor system

Country Status (1)

Country Link
JP (1) JPS57164362A (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61282937A (ja) * 1985-06-07 1986-12-13 Matsushita Electric Ind Co Ltd 情報処理装置
JPH01142836A (ja) * 1987-11-30 1989-06-05 Toshiba Corp 並列処理方法
JP2010117813A (ja) * 2008-11-12 2010-05-27 Nec Electronics Corp デバッグシステム、デバッグ方法、デバッグ制御方法及びデバッグ制御プログラム
US8112677B2 (en) 2010-02-26 2012-02-07 UltraSoC Technologies Limited Method of debugging multiple processes

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61282937A (ja) * 1985-06-07 1986-12-13 Matsushita Electric Ind Co Ltd 情報処理装置
JPH01142836A (ja) * 1987-11-30 1989-06-05 Toshiba Corp 並列処理方法
JP2010117813A (ja) * 2008-11-12 2010-05-27 Nec Electronics Corp デバッグシステム、デバッグ方法、デバッグ制御方法及びデバッグ制御プログラム
US8112677B2 (en) 2010-02-26 2012-02-07 UltraSoC Technologies Limited Method of debugging multiple processes

Also Published As

Publication number Publication date
JPS6239792B2 (enrdf_load_stackoverflow) 1987-08-25

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