JPS57162471A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPS57162471A
JPS57162471A JP4910581A JP4910581A JPS57162471A JP S57162471 A JPS57162471 A JP S57162471A JP 4910581 A JP4910581 A JP 4910581A JP 4910581 A JP4910581 A JP 4910581A JP S57162471 A JPS57162471 A JP S57162471A
Authority
JP
Japan
Prior art keywords
film
implanted
type
coated
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4910581A
Other languages
Japanese (ja)
Inventor
Kosei Kajiwara
Kazutoshi Nagano
Seiji Onaka
Kosuke Yasuno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP4910581A priority Critical patent/JPS57162471A/en
Publication of JPS57162471A publication Critical patent/JPS57162471A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To manufacture the J-FET with high density without fail by a method wherein the semiconductor layer coated with the oxide film is provided with the specified holes which are further coated with the thin film and the impurity ion is implanted in the holes while the gate, source and drain regions are alternately covered with the resist film. CONSTITUTION:The N type layer 3 is epitaxially grown on the P type semiconductor substrate 1 and further formed into the island shape by the P type region 2 reaching the substrate 1 and the entire surface including the islands is coated with the oxide film 10. Next the film 10 is provided with the openings 11-13 corresponding to each source, gate and drain regions by means of etching operation and the exposed surface of said layer 3 is coated with the thin oxide film 14-16. Then the openings 11 and 13 only spread on the film 10 are covered with the photoresist films 17 and 18 while the BF2 ion is implanted in the opening 12 only to form the P type injected layer 19. Next after removing the films 17 and 18, said opening 12 is likewise provided with the film 20 and the P ion is implanted in the openings 11 and 12 to form the N type implanted layers 21 and 22. Then the source, gate and drain regions 4, 5 and 6 are respectively formed by the drive-in operation.
JP4910581A 1981-03-31 1981-03-31 Semiconductor device and manufacture thereof Pending JPS57162471A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4910581A JPS57162471A (en) 1981-03-31 1981-03-31 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4910581A JPS57162471A (en) 1981-03-31 1981-03-31 Semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS57162471A true JPS57162471A (en) 1982-10-06

Family

ID=12821797

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4910581A Pending JPS57162471A (en) 1981-03-31 1981-03-31 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS57162471A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63194363A (en) * 1987-02-06 1988-08-11 Matsushita Electric Works Ltd Manufacture of semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5048878A (en) * 1973-08-31 1975-05-01
JPS5627972A (en) * 1979-08-17 1981-03-18 Oki Electric Ind Co Ltd Manufacture of compound semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5048878A (en) * 1973-08-31 1975-05-01
JPS5627972A (en) * 1979-08-17 1981-03-18 Oki Electric Ind Co Ltd Manufacture of compound semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63194363A (en) * 1987-02-06 1988-08-11 Matsushita Electric Works Ltd Manufacture of semiconductor device

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